DF2166VT33WV Renesas Electronics America, DF2166VT33WV Datasheet - Page 288

• Manufacturer Part Number: DF2166VT33WV
• Description: MCU 16BIT FLASH 3V 512K 144-TQFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2100r

Specifications of DF2166VT33WV

• Core Processor: H8S/2000
• Core Size: 16-Bit
• Speed: 33MHz
• Connectivity: I²C, IrDA, LPC, SCI, SmartCard
• Peripherals: POR, PWM, WDT
• Number Of I /o: 106
• Program Memory Size: 512KB (512K x 8)
• Program Memory Type: FLASH
• Ram Size: 40K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: External
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 144-TQFP, 144-VQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

• PE0/LAD0
8.15
Port F is a 3-bit multi-function input/output port supporting the following register set.
• Port F data direction register (PFDDR)
• Port F output data register (PFODR)
• Port F input data register (PFPIN)
8.15.1
PFDDR is used to specify the input/output attribute of each pin of port F.
8.15.2
PFODR stores output data for the port F pins.
Rev. 3.00, 03/04, page 246 of 830
LPC
PE0DDR
Pin Function
Bit
7 to 3
2
1
0
Bit
7 to 3
2
1
0
The pin function is switched as shown below according to the LPC enabled/disabled and the
PE0DDR.
Port F Output Data Register (PFODR)
Bit Name

PF2DDR
PF1DDR
PF0DDR
Bit Name

PF2ODR
PF1ODR
PF0ODR
Port F
Port F Data Direction Register (PFDDR)
Initial Value

0
0
0
Initial Value

0
0
0
PE0 input pin
0
R/W

W
W
W
R/W

R/W
R/W
R/W
Disabled
Description
Reserved
When the given bit of PFDDR is set to 1, the
corresponding pin of port F will function as an output
port, and when the bit is cleared to 0, the port pin will
function as an input port.
This register is assigned to the same address as that
of PFPIN. When this address is read, the port F states
are returned.
Description
Reserved. When this bit is read, an undefined value is
returned.
The PFODR register stores the output data for the
pins that are used a general output port.
PE0 output pin
1
LAD0 input/output pin
Enabled
