DF2166VT33WV Renesas Electronics America, DF2166VT33WV Datasheet - Page 593
![MCU 16BIT FLASH 3V 512K 144-TQFP](/photos/28/61/286114/144-tqfp_sml.jpg)
DF2166VT33WV
Manufacturer Part Number
DF2166VT33WV
Description
MCU 16BIT FLASH 3V 512K 144-TQFP
Manufacturer
Renesas Electronics America
Series
H8® H8S/2100r
Datasheet
1.HS2168EPI61H-U.pdf
(876 pages)
Specifications of DF2166VT33WV
Core Processor
H8S/2000
Core Size
16-Bit
Speed
33MHz
Connectivity
I²C, IrDA, LPC, SCI, SmartCard
Peripherals
POR, PWM, WDT
Number Of I /o
106
Program Memory Size
512KB (512K x 8)
Program Memory Type
FLASH
Ram Size
40K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
External
Operating Temperature
-20°C ~ 75°C
Package / Case
144-TQFP, 144-VQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
DF2166VT33WV
Manufacturer:
Renesas Electronics America
Quantity:
135
Company:
Part Number:
DF2166VT33WV
Manufacturer:
Renesas Electronics America
Quantity:
10 000
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16.3.18 SMIC Interrupt Register 1 (SMICIR1)
SMICIR1 is one of the registers used to implement SMIC mode. This register includes the bits that
enables/disables an interrupt to the slave. The IBFI3 interrupt is enabled by setting the IBFIE3 bit
in HICR2 to 1.
Bit
7 to 5
4
3
2
1
0
Bit Name Initial Value Slave Host Description
HDTWIE 0
HDTRIE
STARIE
CTLWIE
BUSYIE
All 0
0
0
0
0
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Reserved
The initial value should not be changed.
Transfer Data Transmission End Interrupt Enable
Enables or disables HDTWI interrupt that is IBFI3
interrupt source to the slave.
0: Disables transfer data transmission end interrupt
1: Enables transfer data transmission end interrupt
Transfer Data Receive End Interrupt Enable
Enables or disables HDTRI interrupt that is IBFI3
interrupt source to the slave.
0: Disables transfer data receive end interrupt
1: Enables transfer data receive end interrupt
Status Code Receive End Interrupt Enable
Enables or disables STARI interrupt that is IBFI3
interrupt source to the slave.
0: Disables status code receive end interrupt
1: Enables status code receive end interrupt
Control Code Transmission End Interrupt Enable
Enables or disables CTLWI interrupt that is IBFI3
interrupt source to the slave.
0: Disables control code transmission end interrupt
1: Enables control code transmission end interrupt
Transfer Start Interrupt Enable
Enables or disables BUSYI interrupt that is IBFI3
interrupt source to the slave.
0: Disables transfer start interrupt
1: Enables transfer start interrupt
Rev. 3.00, 03/04, page 551 of 830
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