DF2166VT33WV Renesas Electronics America, DF2166VT33WV Datasheet - Page 410

MCU 16BIT FLASH 3V 512K 144-TQFP

DF2166VT33WV

Manufacturer Part Number
DF2166VT33WV
Description
MCU 16BIT FLASH 3V 512K 144-TQFP
Manufacturer
Renesas Electronics America
Series
H8® H8S/2100r
Datasheet

Specifications of DF2166VT33WV

Core Processor
H8S/2000
Core Size
16-Bit
Speed
33MHz
Connectivity
I²C, IrDA, LPC, SCI, SmartCard
Peripherals
POR, PWM, WDT
Number Of I /o
106
Program Memory Size
512KB (512K x 8)
Program Memory Type
FLASH
Ram Size
40K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
External
Operating Temperature
-20°C ~ 75°C
Package / Case
144-TQFP, 144-VQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
DF2166VT33WV
Manufacturer:
Renesas Electronics America
Quantity:
135
Part Number:
DF2166VT33WV
Manufacturer:
Renesas Electronics America
Quantity:
10 000
14.3.8
SCMR selects smart card interface mode and its format.
Rev. 3.00, 03/04, page 368 of 830
Bit
7 to 4
3
2
1
0
Bit Name
SDIR
SINV
SMIF
Smart Card Mode Register (SCMR)
Initial Value
All 1
0
0
1
0
R/W
R
R/W
R/W
R
R/W
Description
Reserved
These bits are always read as 1 and cannot be
modified.
Smart Card Data Transfer Direction
Selects the serial/parallel conversion format.
0: TDR contents are transmitted with LSB-first.
Stores receive data as LSB first in RDR.
1: TDR contents are transmitted with MSB-first.
Stores receive data as MSB first in RDR.
The SDIR bit is valid only when the 8-bit data format
is used for transmission/reception; when the 7-bit
data format is used, data is always
transmitted/received with LSB-first.
Smart Card Data Invert
Specifies inversion of the data logic level. The SINV
bit does not affect the logic level of the parity bit.
When the parity bit is inverted, invert the O/E bit in
SMR.
0: TDR contents are transmitted as they are.
1: TDR contents are inverted before being
Reserved
This bit is always read as 1 and cannot be modified.
Smart Card Interface Mode Select
When this bit is set to 1, smart card interface mode
is selected.
0: Normal asynchronous or clock synchronous
1: Smart card interface mode
mode
Receive data is stored as it is in RDR.
transmitted. Receive data is stored in inverted
form in RDR.

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