DF2166VT33WV Renesas Electronics America, DF2166VT33WV Datasheet - Page 441

• Manufacturer Part Number: DF2166VT33WV
• Description: MCU 16BIT FLASH 3V 512K 144-TQFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2100r

Specifications of DF2166VT33WV

• Core Processor: H8S/2000
• Core Size: 16-Bit
• Speed: 33MHz
• Connectivity: I²C, IrDA, LPC, SCI, SmartCard
• Peripherals: POR, PWM, WDT
• Number Of I /o: 106
• Program Memory Size: 512KB (512K x 8)
• Program Memory Type: FLASH
• Ram Size: 40K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: External
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 144-TQFP, 144-VQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

14.6
Figure 14.17 shows the general format for clock synchronous communication. In clock
synchronous mode, data is transmitted or received in synchronization with clock pulses. One
character in transfer data consists of 8-bit data. In data transmission, the SCI outputs data from one
falling edge of the synchronization clock to the next. In data reception, the SCI receives data in
synchronization with the rising edge of the synchronization clock. After 8-bit data is output, the
transmission line holds the MSB state. In clock synchronous mode, no parity or multiprocessor bit
is added. Inside the SCI, the transmitter and receiver are independent units, enabling full-duplex
communication by use of a common clock. Both the transmitter and the receiver also have a
double-buffered structure, so that the next transmit data can be written during transmission or the
previous receive data can be read during reception, enabling continuous data transfer.
14.6.1
Either an internal clock generated by the on-chip baud rate generator or an external
synchronization clock input at the SCK pin can be selected, according to the setting of the CKE1
and CKE0 bits in SCR. When the SCI is operated on an internal clock, the synchronization clock
is output from the SCK pin. Eight synchronization clock pulses are output in the transfer of one
character, and when no transfer is performed the clock is fixed high.
Synchronization
clock
Serial data
Note: * High except in continuous transfer
Operation in Clock Synchronous Mode
Clock
Figure 14.17 Data Format in Synchronous Communication (LSB-First)
Don’t care
*
LSB
Bit 0
One unit of transfer data (character or frame)
Bit 1
Bit 2
Bit 3
Bit 4
Rev. 3.00, 03/04, page 399 of 830
Bit 5
Bit 6
MSB
Bit 7
Don’t care
*