DF2166VT33WV Renesas Electronics America, DF2166VT33WV Datasheet - Page 552

• Manufacturer Part Number: DF2166VT33WV
• Description: MCU 16BIT FLASH 3V 512K 144-TQFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2100r

Specifications of DF2166VT33WV

• Core Processor: H8S/2000
• Core Size: 16-Bit
• Speed: 33MHz
• Connectivity: I²C, IrDA, LPC, SCI, SmartCard
• Peripherals: POR, PWM, WDT
• Number Of I /o: 106
• Program Memory Size: 512KB (512K x 8)
• Program Memory Type: FLASH
• Ram Size: 40K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: External
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 144-TQFP, 144-VQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

16.3
Register Descriptions
The LPC registers are listed in the following. Though this LSI accesses these registers as a slave,
some of them can be accessed from the host. For details, see each register description.
• Host interface control register 0 (HICR0)
• Host interface control register 1 (HICR1)
• Host interface control register 2 (HICR2)
• Host interface control register 3 (HICR3)
• Host interface control register 4 (HICR4)
• LPC channel 3 Address register H, L (LADR3H, LADR3L)
• LPC channel 1, 2 address register H, L (LADR12H, LADR12L)
• Input data register 1 (IDR1)
• Input data register 2 (IDR2)
• Input data register 3 (IDR3)
• Output data register 1 (ODR1)
• Output data register 2 (ODR2)
• Output data register 3 (ODR3)
• Bidirectional data registers 0 to 15 (TWR0 to TWR15)
• Status register 1 (STR1)
• Status register 2 (STR2)
• Status register 3 (STR3)
• SERIRQ control register 0 (SIRQCR0)
• SERIRQ control register 1 (SIRQCR1)
• SERIRQ control register 2 (SIRQCR2)
• Host interface select register (HISEL)
SMIC mode:
The following registers are required when SMIC mode is used.
• SMIC flag register (SMICFLG)
• SMIC control status register (SMICCSR)
• SMIC data register (SMICDTR)
• SMIC interrupt register 0 (SMICIR0)
• SMIC interrupt register 1 (SMICIR1)
Rev. 3.00, 03/04, page 510 of 830