ATMEGA128RFA1-ZU Atmel, ATMEGA128RFA1-ZU Datasheet - Page 103

• Manufacturer Part Number: ATMEGA128RFA1-ZU
• Description: IC AVR MCU 2.4GHZ XCEIVER 64QFN
• Manufacturer: Atmel
• Series: ATMEGAr

Specifications of ATMEGA128RFA1-ZU

• Frequency: 2.4GHz
• Data Rate - Maximum: 2Mbps
• Modulation Or Protocol: 802.15.4 Zigbee
• Applications: General Purpose
• Power - Output: 3.5dBm
• Sensitivity: -100dBm
• Voltage - Supply: 1.8 V ~ 3.6 V
• Current - Receiving: 12.5mA
• Current - Transmitting: 14.5mA
• Data Interface: PCB, Surface Mount
• Memory Size: 128kB Flash, 4kB EEPROM, 16kB RAM
• Antenna Connector: PCB, Surface Mount
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 64-VFQFN, Exposed Pad
• Rf Ic Case Style: QFN
• No. Of Pins: 64
• Supply Voltage Range: 1.8V To 3.6V
• Operating Temperature Range: -40°C To +85°C
• Svhc: No SVHC (15-Dec-2010)
• Rohs Compliant: Yes
• Processor Series: ATMEGA128x
• Core: AVR8
• Data Bus Width: 8 bit
• Program Memory Type: Flash
• Program Memory Size: 128 KB
• Data Ram Size: 16 KB
• Interface Type: JTAG
• Maximum Clock Frequency: 16 MHz
• Number Of Programmable I/os: 38
• Number Of Timers: 6
• Operating Supply Voltage: 1.8 V to 3.6 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: EWAVR, EWAVR-BL
• Development Tools By Supplier: ATAVR128RFA1-EK1
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

9.12.3 AES_STATE – AES Plain and Cipher Text Buffer Register
9.12.4 AES_KEY – AES Encryption and Decryption Key Buffer Register
8266B-MCU Wireless-03/11
This register bit indicates an error during AES module run. An error occurs if accessing
AES_CTRL while an AES operation is running or if AES_KEY or AES_STATE Memory
is not loaded completely or less than 16 Byte read from AES_STATE.
• Bit 6:1 – Res5:0 - Reserved
These bits are reserved for future use.
• Bit 0 – AES_DONE - AES Operation Finished with Success
This register bit indicates a successfully finished operation of the AES module.
The AES_STATE register accesses a 16 byte internal data buffer. The buffer is
accessed by reading or writing 16 times to the same address location (AES_STATE). If
the buffer is not completely read or written an error occurs when an AES operation is
started. Note that the AES_STATE register is cleared when entering the radio
transceiver SLEEP state.
• Bit 7:0 – AES_STATE7:0 - AES Plain and Cipher Text Buffer
These bits represent the data buffer for the AES operation.
The AES key register accesses a 128 Bit internal buffer that holds the Encryption or
Decryption Key. The AES_KEY buffer is a 16 Byte buffer. The buffer is accessed by
reading or writing 16 fold to the same address location (AES_KEY). A read access to
registers AES_KEY returns the last round key of the preceding security operation. This
is the key that is required for the corresponding ECB decryption operation after an ECB
encryption operation. However, the initial AES key written to the security module in
advance of an AES run is not modified during an AES operation. This initial key is used
for the next AES run even if it cannot be read from AES_KEY register. Note that the
AES_KEY register is cleared when entering the radio transceiver SLEEP state.
• Bit 7:0 – AES_KEY7:0 - AES Encryption/Decryption Key Buffer
These bits represent the data buffer for the AES Encryption/Decryption key.
Bit
NA ($13E)
Read/Write
Initial Value
Bit
NA ($13F)
Read/Write
Initial Value
RW
RW
7
0
7
0
RW
RW
6
0
6
0
RW
RW
5
0
5
0
AES_STATE7:0
RW
RW
AES_KEY7:0
4
0
4
0
RW
RW
3
0
3
0
RW
RW
2
0
2
0
ATmega128RFA1
RW
RW
1
0
1
0
RW
RW
0
0
0
0
AES_STATE
AES_KEY
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