ATMEGA128RFA1-ZU Atmel, ATMEGA128RFA1-ZU Datasheet - Page 304

• Manufacturer Part Number: ATMEGA128RFA1-ZU
• Description: IC AVR MCU 2.4GHZ XCEIVER 64QFN
• Manufacturer: Atmel
• Series: ATMEGAr

Specifications of ATMEGA128RFA1-ZU

• Frequency: 2.4GHz
• Data Rate - Maximum: 2Mbps
• Modulation Or Protocol: 802.15.4 Zigbee
• Applications: General Purpose
• Power - Output: 3.5dBm
• Sensitivity: -100dBm
• Voltage - Supply: 1.8 V ~ 3.6 V
• Current - Receiving: 12.5mA
• Current - Transmitting: 14.5mA
• Data Interface: PCB, Surface Mount
• Memory Size: 128kB Flash, 4kB EEPROM, 16kB RAM
• Antenna Connector: PCB, Surface Mount
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 64-VFQFN, Exposed Pad
• Rf Ic Case Style: QFN
• No. Of Pins: 64
• Supply Voltage Range: 1.8V To 3.6V
• Operating Temperature Range: -40°C To +85°C
• Svhc: No SVHC (15-Dec-2010)
• Rohs Compliant: Yes
• Processor Series: ATMEGA128x
• Core: AVR8
• Data Bus Width: 8 bit
• Program Memory Type: Flash
• Program Memory Size: 128 KB
• Data Ram Size: 16 KB
• Interface Type: JTAG
• Maximum Clock Frequency: 16 MHz
• Number Of Programmable I/os: 38
• Number Of Timers: 6
• Operating Supply Voltage: 1.8 V to 3.6 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: EWAVR, EWAVR-BL
• Development Tools By Supplier: ATAVR128RFA1-EK1
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

• Bit 5 – ICF5 - Timer/Counter5 Input Capture Flag
The Timer/Counter5 has only limited functionality. It does not have an Input Capture
pin. Therefore this bit has no useful meaning.
• Bit 4 – Res - Reserved Bit
This bit is reserved for future use. A read access always will return zero. A write access
does not modify the content.
• Bit 3 – OCF5C - Timer/Counter5 Output Compare C Match Flag
This flag is set in the timer clock cycle after the counter (TCNT5) value matches the
Output Compare Register C (OCR5C). Note that a Forced Output Compare (FOC5C)
strobe will not set the OCF5C Flag. OCF5C is automatically cleared when the Output
Compare Match C Interrupt Vector is executed. Alternatively, OCF5C can be cleared by
writing a logic one to its bit location.
• Bit 2 – OCF5B - Timer/Counter5 Output Compare B Match Flag
This flag is set in the timer clock cycle after the counter (TCNT5) value matches the
Output Compare Register B (OCR5B). Note that a Forced Output Compare (FOC5B)
strobe will not set the OCF5B Flag. OCF5B is automatically cleared when the Output
Compare Match B Interrupt Vector is executed. Alternatively, OCF5B can be cleared by
writing a logic one to its bit location.
• Bit 1 – OCF5A - Timer/Counter5 Output Compare A Match Flag
This flag is set in the timer clock cycle after the counter (TCNT5) value matches the
Output Compare Register A (OCR5A). Note that a Forced Output Compare (FOC5A)
strobe will not set the OCF5A Flag. OCF5A is automatically cleared when the Output
Compare Match A Interrupt Vector is executed. Alternatively, OCF5A can be cleared by
writing a logic one to its bit location.
• Bit 0 – TOV5 - Timer/Counter5 Overflow Flag
The setting of this flag is dependent of the WGM53:0 bits setting of the Timer/Counter5
Control Register. In Normal and CTC modes, the TOV5 Flag is set when the timer
overflows. TOV5 is automatically cleared when the Timer/Counter5 Overflow Interrupt
Vector is executed. Alternatively, TOV5 can be cleared by writing a logic one to its bit
location.
ATmega128RFA1
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8266B-MCU Wireless-03/11