ATMEGA128RFA1-ZU Atmel, ATMEGA128RFA1-ZU Datasheet - Page 335
ATMEGA128RFA1-ZU
Manufacturer Part Number
ATMEGA128RFA1-ZU
Description
IC AVR MCU 2.4GHZ XCEIVER 64QFN
Manufacturer
Atmel
Series
ATMEGAr
Datasheets
1.ATMEGA128-16AU.pdf
(385 pages)
2.ATAVR128RFA1-EK1.pdf
(13 pages)
3.ATAVR128RFA1-EK1.pdf
(555 pages)
4.ATMEGA128RFA1-ZU.pdf
(524 pages)
Specifications of ATMEGA128RFA1-ZU
Frequency
2.4GHz
Data Rate - Maximum
2Mbps
Modulation Or Protocol
802.15.4 Zigbee
Applications
General Purpose
Power - Output
3.5dBm
Sensitivity
-100dBm
Voltage - Supply
1.8 V ~ 3.6 V
Current - Receiving
12.5mA
Current - Transmitting
14.5mA
Data Interface
PCB, Surface Mount
Memory Size
128kB Flash, 4kB EEPROM, 16kB RAM
Antenna Connector
PCB, Surface Mount
Operating Temperature
-40°C ~ 85°C
Package / Case
64-VFQFN, Exposed Pad
Rf Ic Case Style
QFN
No. Of Pins
64
Supply Voltage Range
1.8V To 3.6V
Operating Temperature Range
-40°C To +85°C
Svhc
No SVHC (15-Dec-2010)
Rohs Compliant
Yes
Processor Series
ATMEGA128x
Core
AVR8
Data Bus Width
8 bit
Program Memory Type
Flash
Program Memory Size
128 KB
Data Ram Size
16 KB
Interface Type
JTAG
Maximum Clock Frequency
16 MHz
Number Of Programmable I/os
38
Number Of Timers
6
Operating Supply Voltage
1.8 V to 3.6 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWAVR, EWAVR-BL
Development Tools By Supplier
ATAVR128RFA1-EK1
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
ATMEGA128RFA1-ZU
Manufacturer:
ATMEL/爱特梅尔
Quantity:
20 000
Company:
Part Number:
ATMEGA128RFA1-ZUR
Manufacturer:
ON
Quantity:
56 000
- ATMEGA128-16AU PDF datasheet
- ATAVR128RFA1-EK1 PDF datasheet #2
- ATAVR128RFA1-EK1 PDF datasheet #3
- ATMEGA128RFA1-ZU PDF datasheet #4
- Current page: 335 of 555
- Download datasheet (6Mb)
22.3 SS
22.3.1 Slave Mode
22.3.2 Master Mode
8266B-MCU Wireless-03/11
__
Pin Functionality
C Code Example
Note:
When the SPI is configured as a Slave, the Slave Select (SS
SS
the user. All other pins are inputs. When SS
SPI is passive, which means that it will not receive incoming data. Note that the SPI
logic will be reset once the SS
synchronization to keep the slave bit counter synchronous with the master clock
generator. When the SS
and receive logic, and drop any partially received data in the Shift Register.
When the SPI is configured as a Master (MSTR in SPCR is set), the user can
determine the direction of the SS
general output pin which does not affect the SPI system. Typically, the pin will be
driving the SS
to ensure Master SPI operation. If the SS
the SPI is configured as a Master with the SS
interprets this as another master selecting the SPI as a slave and starting to send data
to it. To avoid bus contention, the SPI system takes the following actions:
1. The MSTR bit in SPCR is cleared and the SPI system becomes a Slave. As a result
2. The SPIF Flag in SPSR is set, and if the SPI interrupt is enabled, and the I-bit in
Thus, when interrupt-driven SPI transmission is used in Master mode, and there exists
a possibility that SS
is still set. If the MSTR bit has been cleared by a slave select, it must be set by the user
to re-enable SPI Master Mode.
__
void SPI_SlaveInit(void)
{
}
{
}
of the SPI becoming a Slave, the MOSI and SCK pins become inputs.
SREG is set, the interrupt routine will be executed.
is held low, the SPI is activated, and MISO becomes an output if configured so by
/* Set MISO output, all others input */
DDR_SPI = (1<<DD_MISO);
/* Enable SPI */
SPCR = (1<<SPE);
char SPI_SlaveReceive(void)
/* Wait for reception complete */
while(!(SPSR & (1<<SPIF)))
;
/* Return Data Register */
return SPDR;
1.
__
See
pin of the SPI Slave. If SS
"About Code Examples" on page
__
(1)
is driven low, the interrupt should always check that the MSTR bit
__
pin is driven high, the SPI slave will immediately reset the send
__
pin is driven high. The SS
__
pin. If SS
__
__
is configured as an input, it must be held high
__
__
pin is driven low by peripheral circuitry when
__
is driven high, all pins are inputs, and the
is configured as an output, the pin is a
8;
pin defined as an input, the SPI system
ATmega128RFA1
__
__
pin is useful for packet/byte
) pin is always input. When
335
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