ATMEGA128RFA1-ZU Atmel, ATMEGA128RFA1-ZU Datasheet - Page 462

IC AVR MCU 2.4GHZ XCEIVER 64QFN

ATMEGA128RFA1-ZU

Manufacturer Part Number
ATMEGA128RFA1-ZU
Description
IC AVR MCU 2.4GHZ XCEIVER 64QFN
Manufacturer
Atmel
Series
ATMEGAr

Specifications of ATMEGA128RFA1-ZU

Frequency
2.4GHz
Data Rate - Maximum
2Mbps
Modulation Or Protocol
802.15.4 Zigbee
Applications
General Purpose
Power - Output
3.5dBm
Sensitivity
-100dBm
Voltage - Supply
1.8 V ~ 3.6 V
Current - Receiving
12.5mA
Current - Transmitting
14.5mA
Data Interface
PCB, Surface Mount
Memory Size
128kB Flash, 4kB EEPROM, 16kB RAM
Antenna Connector
PCB, Surface Mount
Operating Temperature
-40°C ~ 85°C
Package / Case
64-VFQFN, Exposed Pad
Rf Ic Case Style
QFN
No. Of Pins
64
Supply Voltage Range
1.8V To 3.6V
Operating Temperature Range
-40°C To +85°C
Svhc
No SVHC (15-Dec-2010)
Rohs Compliant
Yes
Processor Series
ATMEGA128x
Core
AVR8
Data Bus Width
8 bit
Program Memory Type
Flash
Program Memory Size
128 KB
Data Ram Size
16 KB
Interface Type
JTAG
Maximum Clock Frequency
16 MHz
Number Of Programmable I/os
38
Number Of Timers
6
Operating Supply Voltage
1.8 V to 3.6 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWAVR, EWAVR-BL
Development Tools By Supplier
ATAVR128RFA1-EK1
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
ATMEGA128RFA1-ZU
Manufacturer:
ATMEL/爱特梅尔
Quantity:
20 000
Part Number:
ATMEGA128RFA1-ZUR
Manufacturer:
ON
Quantity:
56 000
30.7 Register Description
30.7.1 SPMCSR – Store Program Memory Control Register
462
ATmega128RFA1
Table 30-7. Boot Size Configuration with 128 kByte of Flash Memory
The Store Program Memory Control Register contains the control bits needed to control
the Boot Loader operations. Note: Only one SPM instruction should be active at any
time.
• Bit 7 – SPMIE - SPM Interrupt Enable
Bit
$37 ($57)
Read/Write
Initial Value
Variable
ZPAGEMSB
PCPAGE
PCWORD
Notes:
Note:
1
1
0
0
1. The different BOOTSZ Fuse configurations are shown in
1. Z0: should be zero for all SPM commands, byte select for the (E)LPM instruction.
2. See
3. The Z-register is only 16 bits wide. Bit 16 is located in the RAMPZ register in the
about the use of Z-pointer during Self-Programming.
I/O map.
SPMIE
RW
7
0
1
0
1
0
"Addressing the Flash During Self-Programming" on
PC[15:7]
PC[6:0]
Value
RWWSB
R
6
0
words
words
words
words
1024
2048
4096
512
SIGRD
Corresponding
RW
5
0
Z-value
Z16
Z7:Z1
Z7
16
32
4
8
(3)
RWWSRE BLBSET PGWRT
:Z8
RW
(2)
4
0
0x0000 –
0xFDFF
0x0000 –
0xFBFF
0x0000 –
0xF7FF
0x0000 –
0xEFFF
Description
Bit in Z-pointer that is mapped to PCMSB.
Because Z0 is not used; the ZPAGEMSB
equals PAGEMSB + 1.
Program Counter page address: Page
select, for Page Erase and Page Write.
Program Counter word address: Word
select, for filling temporary buffer (must be
zero during Page Write operation)
RW
3
0
0xFE00 –
0xFFFF
0xFC00 –
0xFFFF
0xF800 –
0xFFFF
0xF000 –
0xFFFF
RW
2
0
(1)
PGERS
Figure 30-2 on page
RW
1
0
page 454 for details
0xFDFF
0xFBFF
0xEFFF
0xF7FF
8266B-MCU Wireless-03/11
(1)
SPMEN
RW
0
0
0xFE00
0xFC00
0xF800
0xF000
SPMCSR
453.

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