ATMEGA128RFA1-ZU Atmel, ATMEGA128RFA1-ZU Datasheet - Page 286

IC AVR MCU 2.4GHZ XCEIVER 64QFN

ATMEGA128RFA1-ZU

Manufacturer Part Number
ATMEGA128RFA1-ZU
Description
IC AVR MCU 2.4GHZ XCEIVER 64QFN
Manufacturer
Atmel
Series
ATMEGAr

Specifications of ATMEGA128RFA1-ZU

Frequency
2.4GHz
Data Rate - Maximum
2Mbps
Modulation Or Protocol
802.15.4 Zigbee
Applications
General Purpose
Power - Output
3.5dBm
Sensitivity
-100dBm
Voltage - Supply
1.8 V ~ 3.6 V
Current - Receiving
12.5mA
Current - Transmitting
14.5mA
Data Interface
PCB, Surface Mount
Memory Size
128kB Flash, 4kB EEPROM, 16kB RAM
Antenna Connector
PCB, Surface Mount
Operating Temperature
-40°C ~ 85°C
Package / Case
64-VFQFN, Exposed Pad
Rf Ic Case Style
QFN
No. Of Pins
64
Supply Voltage Range
1.8V To 3.6V
Operating Temperature Range
-40°C To +85°C
Svhc
No SVHC (15-Dec-2010)
Rohs Compliant
Yes
Processor Series
ATMEGA128x
Core
AVR8
Data Bus Width
8 bit
Program Memory Type
Flash
Program Memory Size
128 KB
Data Ram Size
16 KB
Interface Type
JTAG
Maximum Clock Frequency
16 MHz
Number Of Programmable I/os
38
Number Of Timers
6
Operating Supply Voltage
1.8 V to 3.6 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWAVR, EWAVR-BL
Development Tools By Supplier
ATAVR128RFA1-EK1
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
ATMEGA128RFA1-ZU
Manufacturer:
ATMEL/爱特梅尔
Quantity:
20 000
Part Number:
ATMEGA128RFA1-ZUR
Manufacturer:
ON
Quantity:
56 000
18.11.31 TCCR4A – Timer/Counter4 Control Register A
286
ATmega128RFA1
This bit is reserved for future use. A read access always will return zero. A write access
does not modify the content.
• Bit 5 – ICF3 - Timer/Counter3 Input Capture Flag
This flag is set when a capture event occurs on the ICP3 pin. When the Input Capture
Register (ICR3) is set by the WGM33:0 to be used as the TOP value, the ICF3 Flag is
set when the counter reaches the TOP value. ICF3 is automatically cleared when the
Input Capture Interrupt Vector is executed. Alternatively, ICF3 can be cleared by writing
a logic one to its bit location.
• Bit 4 – Res - Reserved Bit
This bit is reserved for future use. A read access always will return zero. A write access
does not modify the content.
• Bit 3 – OCF3C - Timer/Counter3 Output Compare C Match Flag
This flag is set in the timer clock cycle after the counter (TCNT3) value matches the
Output Compare Register C (OCR3C). Note that a Forced Output Compare (FOC3C)
strobe will not set the OCF3C Flag. OCF3C is automatically cleared when the Output
Compare Match C Interrupt Vector is executed. Alternatively, OCF3C can be cleared by
writing a logic one to its bit location.
• Bit 2 – OCF3B - Timer/Counter3 Output Compare B Match Flag
This flag is set in the timer clock cycle after the counter (TCNT3) value matches the
Output Compare Register B (OCR3B). Note that a Forced Output Compare (FOC3B)
strobe will not set the OCF3B Flag. OCF3B is automatically cleared when the Output
Compare Match B Interrupt Vector is executed. Alternatively, OCF3B can be cleared by
writing a logic one to its bit location.
• Bit 1 – OCF3A - Timer/Counter3 Output Compare A Match Flag
This flag is set in the timer clock cycle after the counter (TCNT3) value matches the
Output Compare Register A (OCR3A). Note that a Forced Output Compare (FOC3A)
strobe will not set the OCF3A Flag. OCF3A is automatically cleared when the Output
Compare Match A Interrupt Vector is executed. Alternatively, OCF3A can be cleared by
writing a logic one to its bit location.
• Bit 0 – TOV3 - Timer/Counter3 Overflow Flag
The setting of this flag is dependent of the WGM33:0 bits setting of the Timer/Counter3
Control Register. In Normal and CTC modes, the TOV3 Flag is set when the timer
overflows. TOV3 is automatically cleared when the Timer/Counter3 Overflow Interrupt
Vector is executed. Alternatively, TOV3 can be cleared by writing a logic one to its bit
location.
• Bit 7:6 – COM4A1:0 - Compare Output Mode for Channel A
The Timer/Counter4 has only limited functionality. Therefore the COM4A1:0 bits do not
control the output compare behavior of any pin. The following table shows the
Bit
NA ($A0)
Read/Write
Initial Value
COM4A1 COM4A0 COM4B1 COM4B0 COM4C1 COM4C0 WGM41 WGM40
RW
7
0
RW
6
0
RW
5
0
RW
4
0
RW
3
0
RW
2
0
RW
1
0
8266B-MCU Wireless-03/11
RW
0
0
TCCR4A

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