ATMEGA128RFA1-ZU Atmel, ATMEGA128RFA1-ZU Datasheet - Page 427

• Manufacturer Part Number: ATMEGA128RFA1-ZU
• Description: IC AVR MCU 2.4GHZ XCEIVER 64QFN
• Manufacturer: Atmel
• Series: ATMEGAr

Specifications of ATMEGA128RFA1-ZU

• Frequency: 2.4GHz
• Data Rate - Maximum: 2Mbps
• Modulation Or Protocol: 802.15.4 Zigbee
• Applications: General Purpose
• Power - Output: 3.5dBm
• Sensitivity: -100dBm
• Voltage - Supply: 1.8 V ~ 3.6 V
• Current - Receiving: 12.5mA
• Current - Transmitting: 14.5mA
• Data Interface: PCB, Surface Mount
• Memory Size: 128kB Flash, 4kB EEPROM, 16kB RAM
• Antenna Connector: PCB, Surface Mount
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 64-VFQFN, Exposed Pad
• Rf Ic Case Style: QFN
• No. Of Pins: 64
• Supply Voltage Range: 1.8V To 3.6V
• Operating Temperature Range: -40°C To +85°C
• Svhc: No SVHC (15-Dec-2010)
• Rohs Compliant: Yes
• Processor Series: ATMEGA128x
• Core: AVR8
• Data Bus Width: 8 bit
• Program Memory Type: Flash
• Program Memory Size: 128 KB
• Data Ram Size: 16 KB
• Interface Type: JTAG
• Maximum Clock Frequency: 16 MHz
• Number Of Programmable I/os: 38
• Number Of Timers: 6
• Operating Supply Voltage: 1.8 V to 3.6 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: EWAVR, EWAVR-BL
• Development Tools By Supplier: ATAVR128RFA1-EK1
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

27.10 SRAM DRT Voltage Measurement
8266B-MCU Wireless-03/11
The A/D conversion result ADC
can be calculated when using the internal 1.6V reference voltage according to the
following equation:
Similar the Celsius-temperature θ can be extracted from the A/D conversion result with
this formula:
Note that the above equations are only valid in the allowed operating temperature
range. The translation of the A/D measurement result to a Celsius-temperature value
can be easily achieved with a look-up table in software. The temperature sensor is
connected to a differential input channel with a gain of 10. The offset error of the
channel can be corrected to the first order by using an appropriate channel (e.g.
MUX4:0=01000, MUX5=0, see
measured error of the differential signal processing is then subtracted from the
temperature sensor ADC reading.
Note that changing between the temperature sensor channel and the channel for the
offset error correction can lead to a large difference of the analog input voltage.
Therefore it is recommended to disable the ADC, select the new channel and then
enable the ADC again, or discard the first conversion result from the new input channel.
The decrease of the supply voltage of SRAM block 2 for the leakage current reduction
can also be measured using a special setup of the A/D converter inputs. The details of
the SRAM leakage current reduction are described in section
Retention" on page
to save leakage power while maintaining data retention. This feature applies to all four
SRAM blocks however only the voltage of SRAM block 2 can be verified using the A/D
converter.
The default factory setting for the data retention (DRT) voltage normally guarantees the
best leakage performances. Other values are nevertheless possible and can be
selected by the application software. The true value of the supply voltage reduction is
depending on the manufacturing process and environmental conditions like
temperature. The A/D converter allows determining the value of the DRT voltage of
SRAM block 2. The same voltage setting results for all practical purposes in the same
supply voltage for all other SRAM blocks.
Care must be taken when verifying the DRT voltage of SRAM block 2 with the A/D
converter because it will be put into sleep mode and hence it is not available for the
application program. Addressing the disabled SRAM will return invalid data (all data
read zero). The voltage measurement is split into two parts. One setting allows
measuring the voltage drop from DVDD. The other setting allows verifying the voltage
shift from DVSS. Both measurements are differential and use the programmable gain
amplifier. A low frequency of the conversion clock must be selected due to the high-
impedance nature of the input signal. Accurate and stable voltage readings may just be
available after a long waiting time of up to 100 ms. This limitation is the consequence of
the small leakage currents that discharge the internal de-coupling capacitances before
the supply voltage settles to the DRT value. The following table summarizes the
preferred setup of the DRT voltage measurement:
164. The supply voltage of a disabled SRAM block can be reduced
ADC
θ
/
°
C
TEMP
TEMP
=
Table 27-11 on page
. 1
will always be a positive number. The ideal result
=
13
241
⋅
ADC
4 .
+
TEMP
. 0
885
−
ATmega128RFA1
⋅
272
θ
/
°
8 .
C
429). The in that manner
"SRAM with Data
427