ATMEGA128RFA1-ZU Atmel, ATMEGA128RFA1-ZU Datasheet - Page 259

• Manufacturer Part Number: ATMEGA128RFA1-ZU
• Description: IC AVR MCU 2.4GHZ XCEIVER 64QFN
• Manufacturer: Atmel
• Series: ATMEGAr

Specifications of ATMEGA128RFA1-ZU

• Frequency: 2.4GHz
• Data Rate - Maximum: 2Mbps
• Modulation Or Protocol: 802.15.4 Zigbee
• Applications: General Purpose
• Power - Output: 3.5dBm
• Sensitivity: -100dBm
• Voltage - Supply: 1.8 V ~ 3.6 V
• Current - Receiving: 12.5mA
• Current - Transmitting: 14.5mA
• Data Interface: PCB, Surface Mount
• Memory Size: 128kB Flash, 4kB EEPROM, 16kB RAM
• Antenna Connector: PCB, Surface Mount
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 64-VFQFN, Exposed Pad
• Rf Ic Case Style: QFN
• No. Of Pins: 64
• Supply Voltage Range: 1.8V To 3.6V
• Operating Temperature Range: -40°C To +85°C
• Svhc: No SVHC (15-Dec-2010)
• Rohs Compliant: Yes
• Processor Series: ATMEGA128x
• Core: AVR8
• Data Bus Width: 8 bit
• Program Memory Type: Flash
• Program Memory Size: 128 KB
• Data Ram Size: 16 KB
• Interface Type: JTAG
• Maximum Clock Frequency: 16 MHz
• Number Of Programmable I/os: 38
• Number Of Timers: 6
• Operating Supply Voltage: 1.8 V to 3.6 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: EWAVR, EWAVR-BL
• Development Tools By Supplier: ATAVR128RFA1-EK1
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

18.9.3 Fast PWM Mode
8266B-MCU Wireless-03/11
cleared to zero when the counter value (TCNTn) matches either the OCRnA (WGMn3:0
= 4) or the ICRn (WGMn3:0 = 12). The OCRnA or ICRn define the top value for the
counter, hence also its resolution. This mode allows greater control of the compare
match output frequency. It also simplifies the operation of counting external events.
The timing diagram for the CTC mode is shown in the following figure. The counter
value (TCNTn) increases until a compare match occurs with either OCRnA or ICRn,
and then counter (TCNTn) is cleared.
Figure 18-6. CTC Mode Timing Diagram
Each time the counter reaches the TOP value an interrupt can be generated by either
the OCFnA or ICFn Flag according to the register used to define the TOP value. If the
interrupt is enabled, the interrupt handler routine can be used for updating the TOP
value. However, changing TOP to a value close to BOTTOM when the counter is
running with no or a low prescaler value must be done with care since the CTC mode
does not have the double buffering feature. The counter will miss the compare match if
the new value written to OCRnA or ICRn is lower than the current value of TCNTn. The
counter will then have to count to its maximum value (0xFFFF) and wrap around
starting at 0x0000 before the compare match can occur. In many cases this feature is
not desirable. The fast PWM mode is available as an alternative using OCRnA for
defining TOP (WGMn3:0 = 15). The OCRnA then will be double buffered.
For generating a waveform output in CTC mode, the OCnA output can be set to toggle
its logical level on each compare match by setting the Compare Output mode bits to
toggle mode (COMnA1:0 = 1). The OCnA value will not be visible on the port pin unless
the data direction for the pin is set to output (DDR_OCnA = 1). The waveform
generated will have a maximum frequency of f
(0x0000). The waveform frequency is given by the following equation:
The N variable represents the prescaler factor (1, 8, 64, 256, or 1024).
As for the Normal mode of operation, the TOVn Flag is set in the same clock cycle of
the timer when the counter changes from MAX to 0x0000.
The fast Pulse Width Modulation (PWM) mode (WGMn3:0 = 5, 6, 7, 14 or 15) provides
a high frequency PWM waveform generation option. The fast PWM differs from the
other PWM options by its single-slope operation. The counter counts from BOTTOM to
TOP then restarts from BOTTOM. In non-inverting Compare Output mode, the Output
Compare (OCnx) is cleared on the compare match between TCNTn and OCRnx, and
TCNTn
OCnA
(Toggle)
Period
1
f
OCnA
2
=
2
⋅
3
N
⋅
f
1 (
CLK
OCnA
+
_
OCRnA
4
I
/
= f
O
ATmega128RFA1
clk_I/O
)
/2 when OCRnA is set to zero
OCnA Interrupt Flag Set
or ICFn Interrupt Flag Set
(Interrupt on TOP)
(COMnA1:0 = 1)
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