ATMEGA128RFA1-ZU Atmel, ATMEGA128RFA1-ZU Datasheet - Page 53

• Manufacturer Part Number: ATMEGA128RFA1-ZU
• Description: IC AVR MCU 2.4GHZ XCEIVER 64QFN
• Manufacturer: Atmel
• Series: ATMEGAr

Specifications of ATMEGA128RFA1-ZU

• Frequency: 2.4GHz
• Data Rate - Maximum: 2Mbps
• Modulation Or Protocol: 802.15.4 Zigbee
• Applications: General Purpose
• Power - Output: 3.5dBm
• Sensitivity: -100dBm
• Voltage - Supply: 1.8 V ~ 3.6 V
• Current - Receiving: 12.5mA
• Current - Transmitting: 14.5mA
• Data Interface: PCB, Surface Mount
• Memory Size: 128kB Flash, 4kB EEPROM, 16kB RAM
• Antenna Connector: PCB, Surface Mount
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 64-VFQFN, Exposed Pad
• Rf Ic Case Style: QFN
• No. Of Pins: 64
• Supply Voltage Range: 1.8V To 3.6V
• Operating Temperature Range: -40°C To +85°C
• Svhc: No SVHC (15-Dec-2010)
• Rohs Compliant: Yes
• Processor Series: ATMEGA128x
• Core: AVR8
• Data Bus Width: 8 bit
• Program Memory Type: Flash
• Program Memory Size: 128 KB
• Data Ram Size: 16 KB
• Interface Type: JTAG
• Maximum Clock Frequency: 16 MHz
• Number Of Programmable I/os: 38
• Number Of Timers: 6
• Operating Supply Voltage: 1.8 V to 3.6 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: EWAVR, EWAVR-BL
• Development Tools By Supplier: ATAVR128RFA1-EK1
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

9.4.2.3.3 Configuration of non IEEE 802.15.4 Compliant Scenarios
8266B-MCU Wireless-03/11
Second level of filtering according to IEEE 802.15.4-2006, section 7.5.6.2, is applied to
a received frame if the radio transceiver is in promiscuous mode. However, a
TRX24_RX_END interrupt is issued even if the FCS is invalid. Thus it is necessary to
read bit RX_CRC_VALID of register PHY_RSSI after the TRX24_RX_END interrupt in
order to verify the reception of a frame with a valid FCS.
If a device, operating in promiscuous mode, receives a frame with a valid FCS which in
addition passed the third level filtering according to IEEE 802.15.4-2006, section
7.5.6.2, an acknowledgement frame would be transmitted. According to the definition of
the promiscuous mode a received frame shall not be acknowledged even if it is
requested. Thus bit AACK_DIS_ACK of register CSMA_SEED_1 has to be set to 1.
In all receive modes a TRX24_AMI interrupt is issued, when the received frame
matches the node’s address according to the filter rules described in section
Filtering" on
Alternatively, in RX_ON state of the Basic Operating Mode when a valid PHR is
detected a TRX24_RX_START interrupt is generated and the frame is received. The
end of the frame reception is signalized with a TRX24_RX_END interrupt. At the same
time the bit RX_CRC_VALID of register PHY_RSSI is updated with the result of the
FCS check (see
order to dismiss corrupted frames according to the definition of the promiscuous mode.
Sniffer
Table 9-9 below
RX_AACK configuration bits should be set to their reset values (see
50). All frames received are indicated by a TRX24_RX_START and TRX24_RX_END
interrupt. Bit RX_CRC_VALID of register PHY_RSSI is updated after frame reception
with the result of the FCS check (see
needs to be checked in order to dismiss corrupted frames.
Table 9-9. Configuration of a Sniffer Device
This operating mode is similar to the promiscuous mode.
AACK_PROM_MODE
AACK_FVN_MODE
AACK_DIS_ACK
Register Name
Register Name
page 55.
"Overview" on page
shows a RX_AACK configuration to setup a sniffer device. Other
Register Bits
Register Bits
7:6
1
4
67). The RX_CRC_VALID bit must be checked in
"Overview" on page
Description
Controls the ACK behavior, depends on FCF frame
version number
0x00 : acknowledges only frames with version
number 0, i.e. according to IEEE 802.15.4-2003
frames
0x01 : acknowledges only frames with version
number 0 or 1, i.e. frames according to
IEEE 802.15.4-2006
0x10 : acknowledges only frames with version
number 0 or 1 or 2
0x11 : acknowledges all frames, independent of the
FCF frame version number
Description
1: Enable promiscuous mode
1: Disable generation of acknowledgment
ATmega128RFA1
67). The RX_CRC_VALID bit
Table 9-5 on
"Frame
page
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