ATMEGA128RFA1-ZU Atmel, ATMEGA128RFA1-ZU Datasheet - Page 285

• Manufacturer Part Number: ATMEGA128RFA1-ZU
• Description: IC AVR MCU 2.4GHZ XCEIVER 64QFN
• Manufacturer: Atmel
• Series: ATMEGAr

Specifications of ATMEGA128RFA1-ZU

• Frequency: 2.4GHz
• Data Rate - Maximum: 2Mbps
• Modulation Or Protocol: 802.15.4 Zigbee
• Applications: General Purpose
• Power - Output: 3.5dBm
• Sensitivity: -100dBm
• Voltage - Supply: 1.8 V ~ 3.6 V
• Current - Receiving: 12.5mA
• Current - Transmitting: 14.5mA
• Data Interface: PCB, Surface Mount
• Memory Size: 128kB Flash, 4kB EEPROM, 16kB RAM
• Antenna Connector: PCB, Surface Mount
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 64-VFQFN, Exposed Pad
• Rf Ic Case Style: QFN
• No. Of Pins: 64
• Supply Voltage Range: 1.8V To 3.6V
• Operating Temperature Range: -40°C To +85°C
• Svhc: No SVHC (15-Dec-2010)
• Rohs Compliant: Yes
• Processor Series: ATMEGA128x
• Core: AVR8
• Data Bus Width: 8 bit
• Program Memory Type: Flash
• Program Memory Size: 128 KB
• Data Ram Size: 16 KB
• Interface Type: JTAG
• Maximum Clock Frequency: 16 MHz
• Number Of Programmable I/os: 38
• Number Of Timers: 6
• Operating Supply Voltage: 1.8 V to 3.6 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: EWAVR, EWAVR-BL
• Development Tools By Supplier: ATAVR128RFA1-EK1
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

18.11.29 TIMSK3 – Timer/Counter3 Interrupt Mask Register
18.11.30 TIFR3 – Timer/Counter3 Interrupt Flag Register
8266B-MCU Wireless-03/11
• Bit 7:6 – Res1:0 - Reserved Bit
This bit is reserved for future use. A read access always will return zero. A write access
does not modify the content.
• Bit 5 – ICIE3 - Timer/Counter3 Input Capture Interrupt Enable
When this bit is written to one, and the I-flag in the Status Register is set (interrupts
globally enabled), the Timer/Counter3 Input Capture interrupt is enabled. The
corresponding Interrupt Vector is executed when the ICF3 Flag, located in TIFR3, is
set.
• Bit 4 – Res - Reserved Bit
This bit is reserved for future use. A read access always will return zero. A write access
does not modify the content.
• Bit 3 – OCIE3C - Timer/Counter3 Output Compare C Match Interrupt Enable
When this bit is written to one, and the I-flag in the Status Register is set (interrupts
globally enabled), the Timer/Counter3 Output Compare C Match interrupt is enabled.
The corresponding Interrupt Vector is executed when the OCF3C Flag, located in
TIFR3, is set.
• Bit 2 – OCIE3B - Timer/Counter3 Output Compare B Match Interrupt Enable
When this bit is written to one, and the I-flag in the Status Register is set (interrupts
globally enabled), the Timer/Counter3 Output Compare B Match interrupt is enabled.
The corresponding Interrupt Vector is executed when the OCF3B Flag, located in
TIFR3, is set.
• Bit 1 – OCIE3A - Timer/Counter3 Output Compare A Match Interrupt Enable
When this bit is written to one, and the I-flag in the Status Register is set (interrupts
globally enabled), the Timer/Counter3 Output Compare A Match interrupt is enabled.
The corresponding Interrupt Vector is executed when the OCF3A Flag, located in
TIFR3, is set.
• Bit 0 – TOIE3 - Timer/Counter3 Overflow Interrupt Enable
When this bit is written to one, and the I-flag in the Status Register is set (interrupts
globally enabled), the Timer/Counter3 Overflow interrupt is enabled. The corresponding
Interrupt Vector is executed when the TOV3 Flag, located in TIFR3, is set.
• Bit 7:6 – Res1:0 - Reserved Bit
Bit
NA ($71)
Read/Write
Initial Value
Bit
$18 ($38)
Read/Write
Initial Value
Res1
Res1
R
R
7
0
7
0
Res0
Res0
R
R
6
0
6
0
ICIE3
ICF3
RW
RW
5
0
5
0
Res
Res
R
R
4
0
4
0
OCIE3C
OCF3C
RW
R
3
0
3
0
ATmega128RFA1
OCIE3B
OCF3B
RW
R
2
0
2
0
OCIE3A
OCF3A
RW
RW
1
0
1
0
TOIE3
TOV3
RW
RW
0
0
0
0
TIMSK3
TIFR3
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