ATMEGA128RFA1-ZU Atmel, ATMEGA128RFA1-ZU Datasheet - Page 480

• Manufacturer Part Number: ATMEGA128RFA1-ZU
• Description: IC AVR MCU 2.4GHZ XCEIVER 64QFN
• Manufacturer: Atmel
• Series: ATMEGAr

Specifications of ATMEGA128RFA1-ZU

• Frequency: 2.4GHz
• Data Rate - Maximum: 2Mbps
• Modulation Or Protocol: 802.15.4 Zigbee
• Applications: General Purpose
• Power - Output: 3.5dBm
• Sensitivity: -100dBm
• Voltage - Supply: 1.8 V ~ 3.6 V
• Current - Receiving: 12.5mA
• Current - Transmitting: 14.5mA
• Data Interface: PCB, Surface Mount
• Memory Size: 128kB Flash, 4kB EEPROM, 16kB RAM
• Antenna Connector: PCB, Surface Mount
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 64-VFQFN, Exposed Pad
• Rf Ic Case Style: QFN
• No. Of Pins: 64
• Supply Voltage Range: 1.8V To 3.6V
• Operating Temperature Range: -40°C To +85°C
• Svhc: No SVHC (15-Dec-2010)
• Rohs Compliant: Yes
• Processor Series: ATMEGA128x
• Core: AVR8
• Data Bus Width: 8 bit
• Program Memory Type: Flash
• Program Memory Size: 128 KB
• Data Ram Size: 16 KB
• Interface Type: JTAG
• Maximum Clock Frequency: 16 MHz
• Number Of Programmable I/os: 38
• Number Of Timers: 6
• Operating Supply Voltage: 1.8 V to 3.6 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: EWAVR, EWAVR-BL
• Development Tools By Supplier: ATAVR128RFA1-EK1
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

31.8.3 Serial Programming Instruction Set
Table 31-17. Serial Programming Instruction Set
480
Instruction/Operation
Programming Enable
Chip Erase (Program Memory/EEPROM)
Poll RDY/BSY
¯ ¯ ¯
ATmega128RFA1
3. The serial programming instructions will not work if the communication is out of
4. The Flash is programmed one page at a time. The memory page is loaded one byte
5. The EEPROM array is programmed one byte at a time by supplying the address and
6. Any memory location can be verified by using the Read instruction which returns the
7. At the end of the programming session, RSTN can be set high to commence normal
8. Power-off sequence (if needed): Set RESET to “1”. Turn DEVDD power off.
Table 31-16. Minimum Wait Delay before writing the next Fuse/Flash/EEPROM location
Table 31-17 below
synchronization. When in sync. the second byte (0x53), will echo back when issuing
the third byte of the Programming Enable instruction. Whether the echo is correct or
not, all four bytes of the instruction must be transmitted. If the 0x53 did not echo
back, give RSTN a positive pulse and issue a new Programming Enable command.
at a time by supplying the 7 LSB of the address and data together with the Load
Program Memory Page instruction. To ensure correct loading of the page, the data
low byte must be loaded before data high byte is applied for a given address. The
Program Memory Page is stored by loading the Write Program Memory Page
instruction with the address lines 15:8. Before issuing this command, make sure the
instruction Load Address Extended High Byte has been used to define the MSB of
the address. The address extended high byte with the address lines 23:16 is stored
until the command is re-issued, i.e., the command needs only be issued for the first
page, and when crossing the 64k word boundary. If polling (RDY/BSY
the user must wait at least t
below). Accessing the serial programming interface before the Flash write operation
completes can result in incorrect programming.
data together with the appropriate Write instruction. An EEPROM memory location is
first automatically erased before new data is written. If polling is not used, the user
must wait at least t
In a chip erased device, no 0xFFs in the data file(s) need to be programmed.
content at the selected address at serial output PDO. When reading the Flash
memory, use the instruction Load Address Extended High Byte to define the upper
address byte, which is not included in the Read Program Memory instruction. The
address extended high byte with the address lines 23:16 is stored until the command
is re-issued, i.e., the command needs only be issued for the first page, and when
crossing the 64k word boundary.
operation.
t
WD_CHIPERASE
t
WD_EEPROM
t
Symbol
t
WD_FLASH
WD_FUSE
(5)(6)
and
Byte1
$AC
$AC
$F0
WD_EEPROM
Figure 31-14 on
WD_FLASH
before issuing the next byte (see
Byte2
$53
$80
$00
page 482 describe the Instruction set.
before issuing the next page (see
Instruction Format
Minimum Wait Delay
14.5 ms
4.5 ms
4.5 ms
13 ms
Byte3
$00
$00
$00
(2)
Table 31-16
8266B-MCU Wireless-03/11
¯ ¯ ¯ ) is not used,
data byte out
Byte4
Table 31-16
$00
$00
below).