ATMEGA128RFA1-ZU Atmel, ATMEGA128RFA1-ZU Datasheet - Page 167

• Manufacturer Part Number: ATMEGA128RFA1-ZU
• Description: IC AVR MCU 2.4GHZ XCEIVER 64QFN
• Manufacturer: Atmel
• Series: ATMEGAr

Specifications of ATMEGA128RFA1-ZU

• Frequency: 2.4GHz
• Data Rate - Maximum: 2Mbps
• Modulation Or Protocol: 802.15.4 Zigbee
• Applications: General Purpose
• Power - Output: 3.5dBm
• Sensitivity: -100dBm
• Voltage - Supply: 1.8 V ~ 3.6 V
• Current - Receiving: 12.5mA
• Current - Transmitting: 14.5mA
• Data Interface: PCB, Surface Mount
• Memory Size: 128kB Flash, 4kB EEPROM, 16kB RAM
• Antenna Connector: PCB, Surface Mount
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 64-VFQFN, Exposed Pad
• Rf Ic Case Style: QFN
• No. Of Pins: 64
• Supply Voltage Range: 1.8V To 3.6V
• Operating Temperature Range: -40°C To +85°C
• Svhc: No SVHC (15-Dec-2010)
• Rohs Compliant: Yes
• Processor Series: ATMEGA128x
• Core: AVR8
• Data Bus Width: 8 bit
• Program Memory Type: Flash
• Program Memory Size: 128 KB
• Data Ram Size: 16 KB
• Interface Type: JTAG
• Maximum Clock Frequency: 16 MHz
• Number Of Programmable I/os: 38
• Number Of Timers: 6
• Operating Supply Voltage: 1.8 V to 3.6 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: EWAVR, EWAVR-BL
• Development Tools By Supplier: ATAVR128RFA1-EK1
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

8266B-MCU Wireless-03/11
read from LLCR, LLDRL and LLDRH will be stable after at most five 64 kHz clock
cycles (clock output of the 128 kHz RC oscillator divided by 2).
The output voltage of the Low Leakage Voltage Regulator in sleep mode will be the
most accurate if constantly calibrated to compensate for any environmental changes
(e.g. temperature). However these changes may be slow enough to skip the calibration
during some power-up cycles (e.g. calibrate only every 10
old calibration results during all other times).
After the completion of the power-up process the calibration will start automatically if bit
LLENCAL in the control register LLCR is 1 (default). The completion of a calibration
cycle is indicated by the bit LLDONE in that same register. After the first cycle the
calibration will continue to run until either the device goes into a sleep mode (“power
down” or “power save”) or by setting the LLENCAL bit to 0. The output voltage of the
Low Leakage Voltage Regulator is then defined by the values in the data register
LLDRL and LLDRH and by the bits LLTCO and LLSHORT of the control register.
Write access to the three register is granted when the bit LLENCAL is set to 0. The
application software can then modify the calibration results. Higher values in the data
register generate lower output voltages in the sleep modes. In general it is not
recommended nor required to alter the automatically generated calibration result.
The write access to the three register must follow a certain scheme to be successful.
The registers are implemented in the I/O clock domain while the logic of the Low
Leakage Voltage Regulator runs with 64 kHz (clock output of the 128 kHz RC oscillator
divided by 2). It takes at least two 64 kHz clock cycles before the data written to the
register take effect in the regulator circuit. The write access from the software must be
aware of this process. Furthermore the value of LLDRH must be written first followed by
LLDRL. Otherwise the LLDRH write access will be ignored. The following Assembler
code fragment shows a working example. Note the polling of bit 3 LLCAL of the LLCR
register to verify the completion of the synchronization process.
Assembly Code Example
; poll LLCAL bit of LLCR to check if automatic calibration is
; turned of
wait_calib:
…
clr r20
IOST LLDRH,r18
IOST LLDRL,r19
IOST LLCR,r20
IOLD r20,LLCR
sbrc r20,3
rjmp wait_calib
…
; write LLDRH first
; write LLDRL second
; bit 0 cleared = disable automatic calibration
; not executed if bit 3 of LLCR is cleared
ATmega128RFA1
th
power-up time and use the
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