ATMEGA128RFA1-ZU Atmel, ATMEGA128RFA1-ZU Datasheet - Page 130

• Manufacturer Part Number: ATMEGA128RFA1-ZU
• Description: IC AVR MCU 2.4GHZ XCEIVER 64QFN
• Manufacturer: Atmel
• Series: ATMEGAr

Specifications of ATMEGA128RFA1-ZU

• Frequency: 2.4GHz
• Data Rate - Maximum: 2Mbps
• Modulation Or Protocol: 802.15.4 Zigbee
• Applications: General Purpose
• Power - Output: 3.5dBm
• Sensitivity: -100dBm
• Voltage - Supply: 1.8 V ~ 3.6 V
• Current - Receiving: 12.5mA
• Current - Transmitting: 14.5mA
• Data Interface: PCB, Surface Mount
• Memory Size: 128kB Flash, 4kB EEPROM, 16kB RAM
• Antenna Connector: PCB, Surface Mount
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 64-VFQFN, Exposed Pad
• Rf Ic Case Style: QFN
• No. Of Pins: 64
• Supply Voltage Range: 1.8V To 3.6V
• Operating Temperature Range: -40°C To +85°C
• Svhc: No SVHC (15-Dec-2010)
• Rohs Compliant: Yes
• Processor Series: ATMEGA128x
• Core: AVR8
• Data Bus Width: 8 bit
• Program Memory Type: Flash
• Program Memory Size: 128 KB
• Data Ram Size: 16 KB
• Interface Type: JTAG
• Maximum Clock Frequency: 16 MHz
• Number Of Programmable I/os: 38
• Number Of Timers: 6
• Operating Supply Voltage: 1.8 V to 3.6 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: EWAVR, EWAVR-BL
• Development Tools By Supplier: ATAVR128RFA1-EK1
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

9.12.45 CSMA_SEED_0 – Transceiver CSMA-CA Random Number Generator Seed Register
9.12.46 CSMA_SEED_1 – Transceiver Acknowledgment Frame Control Register 2
130
ATmega128RFA1
This register contains the lower 8 bits of the CSMA_SEED. The upper 3 bits are part of
register CSMA_SEED_1. CSMA_SEED is the seed for the random number generation
that determines the length of the back-off period in the CSMA-CA algorithm. It is
recommended to initialize registers CSMA_SEED by random values. This can be done
using the bits RND_VALUE of register PHY_RSSI.
• Bit 7:0 – CSMA_SEED_07:00 - Seed Value for CSMA Random Number
These bits contain the bits [7:0] of the CSMA_SEED.
This register is a control register for RX_AACK and contains a part of the CSMA_SEED
for the CSMA-CA algorithm.
• Bit 7:6 – AACK_FVN_MODE1:0 - Acknowledgment Frame Filter Mode
The frame control field of the MAC header (MHR) contains a frame version subfield.
The setting of AACK_FVN_MODE specifies the frame filtering behavior of the radio
transceiver. According to the content of these register bits the radio transceiver passes
frames with a specific frame version number, number group or independent of the
frame version number. Thus the register bits AACK_FVN_MODE define the maximum
acceptable frame version. Received frames with a higher frame version number than
configured do not pass the address filter and are not acknowledged.
Bit
NA ($16D)
Read/Write
Initial Value
Bit
NA ($16E)
Read/Write
Initial Value
Bit
NA ($16E)
Read/Write
Initial Value
Bit
NA ($16E)
Read/Write
Initial Value
Bit
NA ($16E)
Read/Write
Initial Value
Generator
RW
7
1
AACK_I_AM_COORD
AACK_FVN_MODE1
CSMA_SEED_11
AACK_SET_PD
RW
6
1
RW
RW
RW
RW
7
0
5
0
3
0
1
1
RW
5
1
CSMA_SEED_07:00
RW
4
0
RW
3
1
AACK_FVN_MODE0
CSMA_SEED_12
CSMA_SEED_10
AACK_DIS_ACK
RW
2
0
RW
RW
RW
RW
6
1
4
0
2
0
0
0
RW
1
1
RW
0
0
8266B-MCU Wireless-03/11
CSMA_SEED_0
CSMA_SEED_1
CSMA_SEED_1
CSMA_SEED_1
CSMA_SEED_1