ATMEGA128RFA1-ZU Atmel, ATMEGA128RFA1-ZU Datasheet - Page 207

• Manufacturer Part Number: ATMEGA128RFA1-ZU
• Description: IC AVR MCU 2.4GHZ XCEIVER 64QFN
• Manufacturer: Atmel
• Series: ATMEGAr

Specifications of ATMEGA128RFA1-ZU

• Frequency: 2.4GHz
• Data Rate - Maximum: 2Mbps
• Modulation Or Protocol: 802.15.4 Zigbee
• Applications: General Purpose
• Power - Output: 3.5dBm
• Sensitivity: -100dBm
• Voltage - Supply: 1.8 V ~ 3.6 V
• Current - Receiving: 12.5mA
• Current - Transmitting: 14.5mA
• Data Interface: PCB, Surface Mount
• Memory Size: 128kB Flash, 4kB EEPROM, 16kB RAM
• Antenna Connector: PCB, Surface Mount
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 64-VFQFN, Exposed Pad
• Rf Ic Case Style: QFN
• No. Of Pins: 64
• Supply Voltage Range: 1.8V To 3.6V
• Operating Temperature Range: -40°C To +85°C
• Svhc: No SVHC (15-Dec-2010)
• Rohs Compliant: Yes
• Processor Series: ATMEGA128x
• Core: AVR8
• Data Bus Width: 8 bit
• Program Memory Type: Flash
• Program Memory Size: 128 KB
• Data Ram Size: 16 KB
• Interface Type: JTAG
• Maximum Clock Frequency: 16 MHz
• Number Of Programmable I/os: 38
• Number Of Timers: 6
• Operating Supply Voltage: 1.8 V to 3.6 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: EWAVR, EWAVR-BL
• Development Tools By Supplier: ATAVR128RFA1-EK1
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

14.4.5 DDRB – Port B Data Direction Register
14.4.6 PINB – Port B Input Pins Address
14.4.7 PORTD – Port D Data Register
8266B-MCU Wireless-03/11
logic zero or the pin has to be configured as an output pin. If PORTBn is written logic
one when the pin is configured as an output pin, the port pin is driven high (one). If
PORTBn is written logic zero when the pin is configured as an output pin, the port pin is
driven low (zero).
• Bit 7:0 – PORTB7:0 - Port B Data Register Value
The DDBn bit in the DDRB Register selects the direction of the PORTB pin n. If DDBn
is written logic one, PBn is configured as an output pin. If DDBn is written logic zero,
PBn is configured as an input pin.
• Bit 7:0 – DDB7:0 - Port B Data Direction Register Value
This register allows access to the PORTB pins independent of the setting of the Data
Direction bit DDBn. The port pin can be read through the PINBn Register bit, and
writing a logic one to PINBn toggles the value of PORTBn.
• Bit 7:0 – PINB7:0 - Port B Input Pins Value
If PORTDn is written logic one when the PORTD pin n is configured as an input pin, the
pull-up resistor is activated. To switch the pull-up resistor off, PORTDn has to be written
logic zero or the pin has to be configured as an output pin. If PORTDn is written logic
one when the pin is configured as an output pin, the port pin is driven high (one). If
PORTDn is written logic zero when the pin is configured as an output pin, the port pin is
driven low (zero).
• Bit 7:0 – PORTD7:0 - Port D Data Register Value
Bit
$04 ($24)
Read/Write
Initial Value
Bit
$03 ($23)
Read/Write
Initial Value
Bit
$0B ($2B)
Read/Write
Initial Value
DDB7
RW
RW
R
7
0
7
0
7
0
RW
R
DDB6
6
0
6
0
RW
6
0
RW
R
5
0
5
0
DDB5
RW
5
0
RW
R
4
0
4
0
PORTD7:0
PINB7:0
DDB4
RW
4
0
RW
R
3
0
3
0
DDB3
RW
3
0
RW
R
2
0
2
0
ATmega128RFA1
DDB2
RW
2
0
RW
R
1
0
1
0
DDB1
RW
RW
R
0
0
1
0
0
0
DDB0
RW
0
0
PORTD
PINB
DDRB
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