ATMEGA128RFA1-ZU Atmel, ATMEGA128RFA1-ZU Datasheet - Page 508

• Manufacturer Part Number: ATMEGA128RFA1-ZU
• Description: IC AVR MCU 2.4GHZ XCEIVER 64QFN
• Manufacturer: Atmel
• Series: ATMEGAr

Specifications of ATMEGA128RFA1-ZU

• Frequency: 2.4GHz
• Data Rate - Maximum: 2Mbps
• Modulation Or Protocol: 802.15.4 Zigbee
• Applications: General Purpose
• Power - Output: 3.5dBm
• Sensitivity: -100dBm
• Voltage - Supply: 1.8 V ~ 3.6 V
• Current - Receiving: 12.5mA
• Current - Transmitting: 14.5mA
• Data Interface: PCB, Surface Mount
• Memory Size: 128kB Flash, 4kB EEPROM, 16kB RAM
• Antenna Connector: PCB, Surface Mount
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 64-VFQFN, Exposed Pad
• Rf Ic Case Style: QFN
• No. Of Pins: 64
• Supply Voltage Range: 1.8V To 3.6V
• Operating Temperature Range: -40°C To +85°C
• Svhc: No SVHC (15-Dec-2010)
• Rohs Compliant: Yes
• Processor Series: ATMEGA128x
• Core: AVR8
• Data Bus Width: 8 bit
• Program Memory Type: Flash
• Program Memory Size: 128 KB
• Data Ram Size: 16 KB
• Interface Type: JTAG
• Maximum Clock Frequency: 16 MHz
• Number Of Programmable I/os: 38
• Number Of Timers: 6
• Operating Supply Voltage: 1.8 V to 3.6 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: EWAVR, EWAVR-BL
• Development Tools By Supplier: ATAVR128RFA1-EK1
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

34.9 SPI Timing Characteristics
508
Symbol
t
Notes:
BUF
Parameter
Bus free time between a STOP and START
condition
1. This parameter is characterized and not 100% tested
2. Required only for f
3. C
4. f
5. This requirement applies to all the ATmega128RFA1 2-wire Serial Interface operation. Other devices connected to
6. The actual low period generated by the ATmega128RFA1 2-wire Serial interface is (1/f
7. The actual low period generated by the ATmega128RFA1 2-wire Serial interface is (1/f
ATmega128RFA1
the 2-wire Serial Bus need only obey the general f
greater than 6MHz for the low time requirement to be strictly met at f
requirement will not be strictly met for f
the bus may communicated at full speed (400 kHz) with other ATmega128RFA1 devices, as well as any other device
with proper t
CK
b
=capacitance of one bus line in pF
=CPU clock frequency
LOW
acceptance margin.
SCL
Figure 34-2. 2-wire Serial Bus Timing
SCL
SDA
See
Table 34-9. SPI Timing Parameters
Description
SCK period
SCK high/low
Rise/fall time
Setup
Hold
Out to SCK
SCK to out
SCK to out high
SS
SCK period
SCK high/low
Rise/fall time
Setup
Hold
__
> 100 kHz
low to out
Figure 34-3 on
t
SU;STA
(1)
SCL
> 308 kHz when f
Master
Master
Master
Master
Master
Master
Master
Master
Mode
Slave
Slave
Slave
Slave
Slave
Slave
page 509 and
Condition
f
f
SCL
SCL
t
HD;STA
≤ 100 kHz
> 100 kHz
t
of
t
LOW
SCL
requirement.
4 t
2 t
Min
t
10
CK
CK
CK
t
Figure 34-4 on
CK
HIGH
t
See
HD;DAT
= 8 MHz. Still, ATmega128RFA1 devices connected to
"SPCR – SPI Control Register" on
SCL
t
LOW
= 100 kHz.
50% duty cycle
page
page 509 for details.
0.5 t
t
Typ
SU;DAT
3.6
10
10
10
10
10
Min
337.
SCK
4.7
1.3
SCL
SCL
– 2/f
– 2/f
CK
CK
Max
8266B-MCU Wireless-03/11
), thus the low time
), thus f
t
SU;STO
1600
Max
t
r
CK
Units
must be
Units
µs
µs
ns
ns
ns
ns
ns
ns
ns
ns
t
BUF