ATMEGA128RFA1-ZU Atmel, ATMEGA128RFA1-ZU Datasheet - Page 356

IC AVR MCU 2.4GHZ XCEIVER 64QFN

ATMEGA128RFA1-ZU

Manufacturer Part Number
ATMEGA128RFA1-ZU
Description
IC AVR MCU 2.4GHZ XCEIVER 64QFN
Manufacturer
Atmel
Series
ATMEGAr

Specifications of ATMEGA128RFA1-ZU

Frequency
2.4GHz
Data Rate - Maximum
2Mbps
Modulation Or Protocol
802.15.4 Zigbee
Applications
General Purpose
Power - Output
3.5dBm
Sensitivity
-100dBm
Voltage - Supply
1.8 V ~ 3.6 V
Current - Receiving
12.5mA
Current - Transmitting
14.5mA
Data Interface
PCB, Surface Mount
Memory Size
128kB Flash, 4kB EEPROM, 16kB RAM
Antenna Connector
PCB, Surface Mount
Operating Temperature
-40°C ~ 85°C
Package / Case
64-VFQFN, Exposed Pad
Rf Ic Case Style
QFN
No. Of Pins
64
Supply Voltage Range
1.8V To 3.6V
Operating Temperature Range
-40°C To +85°C
Svhc
No SVHC (15-Dec-2010)
Rohs Compliant
Yes
Processor Series
ATMEGA128x
Core
AVR8
Data Bus Width
8 bit
Program Memory Type
Flash
Program Memory Size
128 KB
Data Ram Size
16 KB
Interface Type
JTAG
Maximum Clock Frequency
16 MHz
Number Of Programmable I/os
38
Number Of Timers
6
Operating Supply Voltage
1.8 V to 3.6 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWAVR, EWAVR-BL
Development Tools By Supplier
ATAVR128RFA1-EK1
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
ATMEGA128RFA1-ZU
Manufacturer:
ATMEL/爱特梅尔
Quantity:
20 000
Part Number:
ATMEGA128RFA1-ZUR
Manufacturer:
ON
Quantity:
56 000
23.9 Multi-processor Communication Mode
23.9.1 Using MPCMn
356
ATmega128RFA1
division of the system frequency to get the baud rate wanted. In this case an UBRR
value that gives an acceptable low error can be used if possible.
Setting the Multi-processor Communication Mode (MPCMn) bit in UCSRnA enables a
filtering function of incoming frames received by the USART receiver. Frames that do
not contain address information will be ignored and not put into the receive buffer. This
effectively reduces the number of incoming frames that has to be handled by the MCU,
in a system with multiple MCUs that communicate via the same serial bus. The
transmitter is unaffected by the MPCMn setting, but has to be used differently when it is
a part of a system utilizing the multi-processor communication mode.
If the receiver is set up to receive frames that contain 5 to 8 data bits, then the first stop
bit indicates if the frame contains data or address information. If the receiver is set up
for frames with nine data bits, then the ninth bit (RXB8n) is used for identifying address
and data frames. When the frame type bit (the first stop or the ninth bit) is one, the
frame contains an address. When the frame type bit is zero the frame is a data frame.
The multi-processor communication mode enables several slave MCUs to receive data
from a master MCU. This is done by first decoding an address frame to find out which
MCU has been addressed. If a particular slave MCU has been addressed, it will receive
the following data frames as normal, while the other slave MCUs will ignore the
received frames until another address frame is received.
For an MCU to act as a master MCU, it can use a 9 bit character frame format
(UCSZn2:0 = 7). The 9
or cleared when a data frame (TXB = 0) is being transmitted. The slave MCUs must in
this case be set to use a 9 bit character frame format.
The following procedure should be used to exchange data in multi-processor
communication mode:
1. All slave MCUs are in multi-processor communication mode (MPCMn in UCSRnA is
2. The master MCU sends an address frame, and all slaves receive and read this
3. Each slave MCU reads the UDRn register and determines if it has been selected. If
4. The addressed MCU will receive all data frames until a new address frame is
5. When the last data frame is received by the addressed MCU, the addressed MCU
Using any of the 5 to 8 bit character frame formats is possible, but impractical since the
receiver must change between using n and n+1 character frame formats. This makes
full-duplex operation difficult since the transmitter and receiver uses the same character
size setting. If 5 to 8 bit character frames are used, the transmitter must be set to use
two stop bit (USBSn = 1) since the first stop bit is used for indicating the frame type.
set).
frame. In the slave MCUs, the RXCn flag in UCSRnA will be set as normal.
so, it clears the MPCMn bit in UCSRnA, otherwise it waits for the next address byte
and keeps the MPCMn setting.
received. The other slave MCUs, which still have the MPCMn bit set, will ignore the
data frames.
sets the MPCMn bit and waits for a new address frame from master. The process
then repeats from 2.
th
bit (TXB8n) must be set when an address frame (TXB8n = 1)
8266B-MCU Wireless-03/11

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