ATMEGA128RFA1-ZU Atmel, ATMEGA128RFA1-ZU Datasheet - Page 422

IC AVR MCU 2.4GHZ XCEIVER 64QFN

ATMEGA128RFA1-ZU

Manufacturer Part Number
ATMEGA128RFA1-ZU
Description
IC AVR MCU 2.4GHZ XCEIVER 64QFN
Manufacturer
Atmel
Series
ATMEGAr

Specifications of ATMEGA128RFA1-ZU

Frequency
2.4GHz
Data Rate - Maximum
2Mbps
Modulation Or Protocol
802.15.4 Zigbee
Applications
General Purpose
Power - Output
3.5dBm
Sensitivity
-100dBm
Voltage - Supply
1.8 V ~ 3.6 V
Current - Receiving
12.5mA
Current - Transmitting
14.5mA
Data Interface
PCB, Surface Mount
Memory Size
128kB Flash, 4kB EEPROM, 16kB RAM
Antenna Connector
PCB, Surface Mount
Operating Temperature
-40°C ~ 85°C
Package / Case
64-VFQFN, Exposed Pad
Rf Ic Case Style
QFN
No. Of Pins
64
Supply Voltage Range
1.8V To 3.6V
Operating Temperature Range
-40°C To +85°C
Svhc
No SVHC (15-Dec-2010)
Rohs Compliant
Yes
Processor Series
ATMEGA128x
Core
AVR8
Data Bus Width
8 bit
Program Memory Type
Flash
Program Memory Size
128 KB
Data Ram Size
16 KB
Interface Type
JTAG
Maximum Clock Frequency
16 MHz
Number Of Programmable I/os
38
Number Of Timers
6
Operating Supply Voltage
1.8 V to 3.6 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWAVR, EWAVR-BL
Development Tools By Supplier
ATAVR128RFA1-EK1
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
ATMEGA128RFA1-ZU
Manufacturer:
ATMEL/爱特梅尔
Quantity:
20 000
Part Number:
ATMEGA128RFA1-ZUR
Manufacturer:
ON
Quantity:
56 000
27.7.2 Analog Noise Canceling Techniques
27.7.3 Offset Compensation Schemes
27.7.4 Differential Amplifier Limitations
27.7.5 ADC Accuracy Definitions
422
ATmega128RFA1
Digital circuitry inside and outside the device generates EMI which might affect the
accuracy of analog measurements. If conversion accuracy is critical, the noise level can
be reduced by applying the following techniques:
1. Keep analog signal paths as short as possible. Make sure analog tracks run over the
2. Use the ADC noise canceller function to reduce induced noise from the CPU.
3. If any ADC port pins are used as digital outputs, it is essential that these do not
The differential amplifier has a built-in offset cancellation circuitry that nulls the offset of
differential measurements as much as possible. The remaining offset in the analog path
can be measured directly by selecting the same channel for both differential inputs. This
offset residue can then be subtracted in software from the measurement results. The
offset on any channel can be reduced below one LSB using this kind of software based
offset correction.
The programmable gain, differential amplifier (PGA) converts a differential input voltage
to a single-ended output voltage that is further processed with the 10 bit ADC. The
performance of the PGA is determined by the physical properties of its operational
amplifier:
• The noise of PGA adds to the random error of the ADC conversation result.
• The gain of the PGA falls if the output voltage of the operational amplifier
An n-bit single-ended ADC converts a voltage linearly between 0V and V
(LSB’s). The lowest code is read as 0, and the highest code is read as 2
Several parameters describe the deviation from the ideal behavior:
• Offset: The deviation of the first transition (0x000 to 0x001) compared to the ideal
ground plane, and keep them well away from high-speed switching digital tracks.
switch while a conversion is in progress.
However the PGA noise enables the application of oversampling techniques to
recover or even increase the ADC resolution.
approaches the supply rails (AVSS) resulting in an increased non-linearity. Hence
for reasonable INL and DNL performance the input voltage range must be limited.
transition (at 0.5 LSB). Ideal value: 0 LSB.
8266B-MCU Wireless-03/11
n
-1.
REF
in 2
n
steps

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