ATMEGA128RFA1-ZU Atmel, ATMEGA128RFA1-ZU Datasheet - Page 47

• Manufacturer Part Number: ATMEGA128RFA1-ZU
• Description: IC AVR MCU 2.4GHZ XCEIVER 64QFN
• Manufacturer: Atmel
• Series: ATMEGAr

Specifications of ATMEGA128RFA1-ZU

• Frequency: 2.4GHz
• Data Rate - Maximum: 2Mbps
• Modulation Or Protocol: 802.15.4 Zigbee
• Applications: General Purpose
• Power - Output: 3.5dBm
• Sensitivity: -100dBm
• Voltage - Supply: 1.8 V ~ 3.6 V
• Current - Receiving: 12.5mA
• Current - Transmitting: 14.5mA
• Data Interface: PCB, Surface Mount
• Memory Size: 128kB Flash, 4kB EEPROM, 16kB RAM
• Antenna Connector: PCB, Surface Mount
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 64-VFQFN, Exposed Pad
• Rf Ic Case Style: QFN
• No. Of Pins: 64
• Supply Voltage Range: 1.8V To 3.6V
• Operating Temperature Range: -40°C To +85°C
• Svhc: No SVHC (15-Dec-2010)
• Rohs Compliant: Yes
• Processor Series: ATMEGA128x
• Core: AVR8
• Data Bus Width: 8 bit
• Program Memory Type: Flash
• Program Memory Size: 128 KB
• Data Ram Size: 16 KB
• Interface Type: JTAG
• Maximum Clock Frequency: 16 MHz
• Number Of Programmable I/os: 38
• Number Of Timers: 6
• Operating Supply Voltage: 1.8 V to 3.6 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: EWAVR, EWAVR-BL
• Development Tools By Supplier: ATAVR128RFA1-EK1
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

9.4.2.3 RX_AACK_ON – Receive with Automatic ACK
8266B-MCU Wireless-03/11
• Additional Frame Filtering Properties (register XAH_CTRL_1, CSMA_SEED_1)
The addresses for the address match algorithm are to be stored in the appropriate
address registers. Additional control of the RX_AACK mode is done with registers
XAH_CTRL_1 and CSMA_SEED_1.
As long as a short address has not been set, only broadcast frames and frames
matching the IEEE address can be received.
Configuration examples for different device operating modes and handling of various
frame types can be found in section
page 50.
TX_ARET configuration steps:
• Leave register bit TX_AUTO_CRC_ON = 1
• Configure CSMA-CA
• Configure CCA (see section
MAX_FRAME_RETRIES (register XAH_CTRL_0) defines the maximum number of
frame retransmissions.
The register bits MAX_CSMA_RETRIES (register XAH_CTRL_0) configure the number
of CSMA-CA retries after a busy channel is detected.
The CSMA_SEED_0 and CSMA_SEED_1 registers define a random seed for the back-
off-time random-number generator of the radio transceiver.
The MAX_BE and MIN_BE register bits (register CSMA_BE) set the maximum and
minimum CSMA back-off exponent (according to
The general functionality of the RX_AACK procedure is shown in
49.
The gray shaded area is the standard flow of a RX_AACK transaction for
IEEE 802.15.4 compliant frames (refer to section
page 51). All other procedures are exceptions for specific operating modes or frame
formats (refer to section
page 53).
The frame filtering operation is described in detail in section
55.
In RX_AACK_ON state, the radio transceiver listens for incoming frames. After
detecting SHR and a valid PHR, the radio transceiver parses the frame content of the
MAC header (MHR) as described in section
o
o
o
o
o
o
o
o
o
o
MAX_FRAME_RETRIES
MAX_CSMA_RETRIES
CSMA_SEED
MAX_BE, MIN_BE
Handling of Pending Data Indicator
Characterize as PAN coordinator
Handling of Slotted Acknowledgement
Promiscuous Mode
Enable or disable automatic ACK generation
Handling of reserved frame types
"Configuration of non IEEE 802.15.4 Compliant Scenarios" on
"Configuration and CCA Request" on page
"Description of RX_AACK Configuration Bits" on
register XAH_CTRL_0
register XAH_CTRL_0
registersCSMA_SEED_0, CSMA_SEED_1
register CSMA_BE
"PHY Header (PHR)" on page 62.
register TRX_CTRL_1
[1] on page 101).
"Configuration of IEEE Scenarios" on
ATmega128RFA1
"Frame Filtering" on
Figure 9-19 on
72)
page
page
47