ATMEGA128RFA1-ZU Atmel, ATMEGA128RFA1-ZU Datasheet - Page 41

IC AVR MCU 2.4GHZ XCEIVER 64QFN

ATMEGA128RFA1-ZU

Manufacturer Part Number
ATMEGA128RFA1-ZU
Description
IC AVR MCU 2.4GHZ XCEIVER 64QFN
Manufacturer
Atmel
Series
ATMEGAr

Specifications of ATMEGA128RFA1-ZU

Frequency
2.4GHz
Data Rate - Maximum
2Mbps
Modulation Or Protocol
802.15.4 Zigbee
Applications
General Purpose
Power - Output
3.5dBm
Sensitivity
-100dBm
Voltage - Supply
1.8 V ~ 3.6 V
Current - Receiving
12.5mA
Current - Transmitting
14.5mA
Data Interface
PCB, Surface Mount
Memory Size
128kB Flash, 4kB EEPROM, 16kB RAM
Antenna Connector
PCB, Surface Mount
Operating Temperature
-40°C ~ 85°C
Package / Case
64-VFQFN, Exposed Pad
Rf Ic Case Style
QFN
No. Of Pins
64
Supply Voltage Range
1.8V To 3.6V
Operating Temperature Range
-40°C To +85°C
Svhc
No SVHC (15-Dec-2010)
Rohs Compliant
Yes
Processor Series
ATMEGA128x
Core
AVR8
Data Bus Width
8 bit
Program Memory Type
Flash
Program Memory Size
128 KB
Data Ram Size
16 KB
Interface Type
JTAG
Maximum Clock Frequency
16 MHz
Number Of Programmable I/os
38
Number Of Timers
6
Operating Supply Voltage
1.8 V to 3.6 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWAVR, EWAVR-BL
Development Tools By Supplier
ATAVR128RFA1-EK1
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
ATMEGA128RFA1-ZU
Manufacturer:
ATMEL/爱特梅尔
Quantity:
20 000
Part Number:
ATMEGA128RFA1-ZUR
Manufacturer:
ON
Quantity:
56 000
9.4.1.4.2 PLL_ON and RX_ON States
9.4.1.4.3 BUSY_TX and RX_ON States
8266B-MCU Wireless-03/11
During this wake-up procedure the calibration of the filter-tuning network (FTN) is
performed. Entering TRX_OFF state is signaled by the TRX24_AWAKE interrupt, if
enabled.
The transition from TRX_OFF to PLL_ON and RX_ON mode is shown in
below.
Figure 9-15. Transition from TRX_OFF to PLL_ON and RX_ON State
Entering the commands PLL_ON or RX_ON in TRX_OFF state initiates a ramp-up
sequence of the internal 1.8V voltage regulator for the analog domain (AVREG), if
AVREG is not already enabled by the AVR ADC module. RX_ON state can be entered
any time from PLL_ON state regardless whether the PLL has already locked as
indicated by the TRX24_PLL_LOCK interrupt.
The transition from PLL_ON to BUSY_TX state and subsequent to RX_ON state is
shown in
Figure 9-16. PLL_ON to BUSY_TX to RX_ON Timing
Starting from PLL_ON state it is assumed that the PLL is already locked. A
transmission is initiated either by writing “1” to bit SLPTR or by command TX_START.
The PLL settles to the transmit frequency and the PA is enabled.
Note:
Event
State
Block
Command
Time
Event
State
Block
Com m and
Tim e
Figure 9-16
1. If TRX_CMD = RX_ON in TRX_OFF state RX_ON state is entered immediately,
2. If the AVR ADC module is enabled, the AVREG is already started and thus the
TRX_OFF
even if the PLL has not settled.
state transition time t
PLL_O N
0
PLL
AVREG
PLL_ON
or com m and TX_START
below.
SLPTR
t
TR4
0
TR4
t
PA
TR 10
is reduced.
PLL
16
BUSY_TX
100
PA, TX
TRX24_PLL_LOCK IRQ
PLL_ON
R X_O N
ATmega128RFA1
RX_ON
RX_ON
RX
x
RX_O N
t
TR8
t
PLL
TR 11
x + 32
Figure 9-15
RX
Tim e [µ s]
Time [µs]
41

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