ATMEGA128RFA1-ZU Atmel, ATMEGA128RFA1-ZU Datasheet - Page 86

• Manufacturer Part Number: ATMEGA128RFA1-ZU
• Description: IC AVR MCU 2.4GHZ XCEIVER 64QFN
• Manufacturer: Atmel
• Series: ATMEGAr

Specifications of ATMEGA128RFA1-ZU

• Frequency: 2.4GHz
• Data Rate - Maximum: 2Mbps
• Modulation Or Protocol: 802.15.4 Zigbee
• Applications: General Purpose
• Power - Output: 3.5dBm
• Sensitivity: -100dBm
• Voltage - Supply: 1.8 V ~ 3.6 V
• Current - Receiving: 12.5mA
• Current - Transmitting: 14.5mA
• Data Interface: PCB, Surface Mount
• Memory Size: 128kB Flash, 4kB EEPROM, 16kB RAM
• Antenna Connector: PCB, Surface Mount
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 64-VFQFN, Exposed Pad
• Rf Ic Case Style: QFN
• No. Of Pins: 64
• Supply Voltage Range: 1.8V To 3.6V
• Operating Temperature Range: -40°C To +85°C
• Svhc: No SVHC (15-Dec-2010)
• Rohs Compliant: Yes
• Processor Series: ATMEGA128x
• Core: AVR8
• Data Bus Width: 8 bit
• Program Memory Type: Flash
• Program Memory Size: 128 KB
• Data Ram Size: 16 KB
• Interface Type: JTAG
• Maximum Clock Frequency: 16 MHz
• Number Of Programmable I/os: 38
• Number Of Timers: 6
• Operating Supply Voltage: 1.8 V to 3.6 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: EWAVR, EWAVR-BL
• Development Tools By Supplier: ATAVR128RFA1-EK1
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

9.8 Radio Transceiver Extended Feature Set
9.8.1 Random Number Generator
86
ATmega128RFA1
command TX_START to register TRX_STATE after a Frame Buffer write access and
while the radio transceiver is in state PLL_ON or TX_ARET_ON. The TRX24_TX_END
interrupt indicates the completion of the transaction.
Figure 9-28. Transaction between radio transceiver and microcontroller during transmit
Alternatively a frame transmission can be started first, followed by the Frame Buffer
write access (PSDU data) as shown in
critical applications.
A transmission is initiated either by writing SLPTR or by writing the TX_START
command to the TRX_CMD bits of register TRX_STATE. The radio transceiver then
starts transmitting the SHR which is internally generated.
This first phase requires 16 µs for PLL settling and 160 s for SHR transmission. The
PHR must be available in the Frame Buffer before this time elapses. Furthermore the
Frame Buffer must be filled faster than the frame is transmitted to prevent a buffer
under-run.
Figure 9-29. Time Optimized Frame Transmit Procedure
The radio transceiver incorporates a 2-bit, noise observing, true random number
generator to be used to:
• Generate random seeds for CSMA-CA algorithm
page
44);
Write TRX_CMD = TX_START, or write SLPTR
Write TRX_CMD = TX_START, or write SLPTR
Write frame data (Frame Buffer access)
Write frame data (Frame Buffer access)
IRQ issued (TX_END)
IRQ issued (TX_END)
(Register access)
(Register access)
Figure 9-29
(see"Extended Operating Mode" on
below. This is applicable for time
8266B-MCU Wireless-03/11