ATMEGA128RFA1-ZU Atmel, ATMEGA128RFA1-ZU Datasheet - Page 90

• Manufacturer Part Number: ATMEGA128RFA1-ZU
• Description: IC AVR MCU 2.4GHZ XCEIVER 64QFN
• Manufacturer: Atmel
• Series: ATMEGAr

Specifications of ATMEGA128RFA1-ZU

• Frequency: 2.4GHz
• Data Rate - Maximum: 2Mbps
• Modulation Or Protocol: 802.15.4 Zigbee
• Applications: General Purpose
• Power - Output: 3.5dBm
• Sensitivity: -100dBm
• Voltage - Supply: 1.8 V ~ 3.6 V
• Current - Receiving: 12.5mA
• Current - Transmitting: 14.5mA
• Data Interface: PCB, Surface Mount
• Memory Size: 128kB Flash, 4kB EEPROM, 16kB RAM
• Antenna Connector: PCB, Surface Mount
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 64-VFQFN, Exposed Pad
• Rf Ic Case Style: QFN
• No. Of Pins: 64
• Supply Voltage Range: 1.8V To 3.6V
• Operating Temperature Range: -40°C To +85°C
• Svhc: No SVHC (15-Dec-2010)
• Rohs Compliant: Yes
• Processor Series: ATMEGA128x
• Core: AVR8
• Data Bus Width: 8 bit
• Program Memory Type: Flash
• Program Memory Size: 128 KB
• Data Ram Size: 16 KB
• Interface Type: JTAG
• Maximum Clock Frequency: 16 MHz
• Number Of Programmable I/os: 38
• Number Of Timers: 6
• Operating Supply Voltage: 1.8 V to 3.6 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: EWAVR, EWAVR-BL
• Development Tools By Supplier: ATAVR128RFA1-EK1
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

9.8.3.2 Antenna Diversity Application Example
90
ATmega128RFA1
Antenna Diversity uses two antennas to switch to the most reliable RF signal path. This
is done by the radio transceiver during RX_LISTEN and RX_AACK_ON state without
interaction of the application software. Both antennas should be carefully separated
from each other to ensure highly independent receive signals.
Antenna Diversity can be used in Basic and Extended Operating Modes and can also
be combined with other features and operating modes like High Data Rate Mode and
RX/TX Indication.
A block diagram for an application using an antenna switch is shown in the following
figure.
Figure 9-33. External Antenna Diversity – Block Diagram
Generally, the Antenna Diversity algorithm is enabled with bit ANT_DIV_EN=1 in
register ANT_DIV. For the External Antenna Diversity the control of the antenna switch
(SW1) must be enabled by bit ANT_EXT_SW_EN of register ANT_DIV. Under this
condition the control pins DIG1 and DIG2 are configured as outputs. DIG1 and DIG2
are used to feed the antenna switch signal and its inverse to the differential inputs of the
RF Switch (SW1).
The selected antenna is indicated by bit ANT_SEL of register ANT_DIV. The antenna
selection continues searching for new frames on both antennas after the frame
reception is completed. However the register bit ANT_SEL maintains its previous value
(from the last received frame) until a new SHR has been found and the selection
algorithm locked into one antenna again. Then the register bit ANT_SEL is updated.
The antenna defined by the ANT_CTRL bits of register ANT_DIV is selected for
transmission. If for example the same antenna as selected for reception is to be used
for transmission, the antenna must be set using the ANT_CTRL bits based on the value
read from the ANT_SEL bit. It is recommended to read bit ANT_SEL after the
TRX24_RX_START interrupt.
The autonomous search and selection allows the use of Antenna Diversity during
reception even if the application software currently does not control the radio
transceiver for instance in Extended Operating Mode.
An application software defined selection of a certain antenna can be done by disabling
the automatic Antenna Diversity algorithm (ANT_DIV_EN = 0) and selecting one
antenna using register bit ANT_CTRL.
A N T 0
A N T 1
S W 1
B 1
10
1
2
7
8
9
...
...
A V S S
R F P
R F N
A V S S
D IG 2
D IG 4
1 4
A T m ega 128R FA 1
1 5
8266B-MCU Wireless-03/11