ATMEGA128RFA1-ZU Atmel, ATMEGA128RFA1-ZU Datasheet - Page 464

• Manufacturer Part Number: ATMEGA128RFA1-ZU
• Description: IC AVR MCU 2.4GHZ XCEIVER 64QFN
• Manufacturer: Atmel
• Series: ATMEGAr

Specifications of ATMEGA128RFA1-ZU

• Frequency: 2.4GHz
• Data Rate - Maximum: 2Mbps
• Modulation Or Protocol: 802.15.4 Zigbee
• Applications: General Purpose
• Power - Output: 3.5dBm
• Sensitivity: -100dBm
• Voltage - Supply: 1.8 V ~ 3.6 V
• Current - Receiving: 12.5mA
• Current - Transmitting: 14.5mA
• Data Interface: PCB, Surface Mount
• Memory Size: 128kB Flash, 4kB EEPROM, 16kB RAM
• Antenna Connector: PCB, Surface Mount
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 64-VFQFN, Exposed Pad
• Rf Ic Case Style: QFN
• No. Of Pins: 64
• Supply Voltage Range: 1.8V To 3.6V
• Operating Temperature Range: -40°C To +85°C
• Svhc: No SVHC (15-Dec-2010)
• Rohs Compliant: Yes
• Processor Series: ATMEGA128x
• Core: AVR8
• Data Bus Width: 8 bit
• Program Memory Type: Flash
• Program Memory Size: 128 KB
• Data Ram Size: 16 KB
• Interface Type: JTAG
• Maximum Clock Frequency: 16 MHz
• Number Of Programmable I/os: 38
• Number Of Timers: 6
• Operating Supply Voltage: 1.8 V to 3.6 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: EWAVR, EWAVR-BL
• Development Tools By Supplier: ATAVR128RFA1-EK1
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

30.7.2 NEMCR – Flash Extended-Mode Control-Register
464
ATmega128RFA1
the following SPM instruction will store the value in R1:R0 in the temporary page buffer
addressed by the Z pointer. The LSB of the Z pointer is ignored. The SPMEN bit will
auto-clear upon completion of an SPM instruction, or if no SPM instruction is executed
within four clock cycles. During page erase and page write, the SPMEN bit remain high
until the operation is completed. Writing any other combination than "10001", "01001",
"00101", "00011" or "00001" in the lower five bits will have no effect.
The Flash Extended-Mode Control-Register handles the extended address-mode of the
extra rows.
• Bit 7 – Resx7 - Reserved
• Bit 6 – ENEAM - Enable Extended Address Mode for Extra Rows
When active high, the extended address mode of the extra rows is enabled. The
address is decoded from bits AEAM1:0 of this register.
• Bit 5:4 – AEAM1:0 - Address for Extended Address Mode of Extra Rows
These bits are only used when bit ENEAM of this register is set high. Then AEAM1:0
are used to decode the addresses of the extra rows. A value of 0 decodes the default
factory row that is also accessible when the extended address mode is deactivated.
Table 30-8 AEAM Register Bits
• Bit 3:0 – Resx3:0 - Reserved
Bit
NA ($75)
Read/Write
Initial Value
Register Bits
AEAM1:0
Resx7
RW
7
0
ENEAM
RW
6
0
AEAM1
RW
5
0
Value
0
1
2
3
AEAM0
RW
4
0
Description
Factory Row
User Row 1
User Row 2
User Row 3
Resx3
RW
3
1
Resx2
RW
2
0
Resx1
RW
1
1
8266B-MCU Wireless-03/11
Resx0
RW
0
0
NEMCR