ATMEGA128RFA1-ZU Atmel, ATMEGA128RFA1-ZU Datasheet - Page 509

IC AVR MCU 2.4GHZ XCEIVER 64QFN

ATMEGA128RFA1-ZU

Manufacturer Part Number
ATMEGA128RFA1-ZU
Description
IC AVR MCU 2.4GHZ XCEIVER 64QFN
Manufacturer
Atmel
Series
ATMEGAr

Specifications of ATMEGA128RFA1-ZU

Frequency
2.4GHz
Data Rate - Maximum
2Mbps
Modulation Or Protocol
802.15.4 Zigbee
Applications
General Purpose
Power - Output
3.5dBm
Sensitivity
-100dBm
Voltage - Supply
1.8 V ~ 3.6 V
Current - Receiving
12.5mA
Current - Transmitting
14.5mA
Data Interface
PCB, Surface Mount
Memory Size
128kB Flash, 4kB EEPROM, 16kB RAM
Antenna Connector
PCB, Surface Mount
Operating Temperature
-40°C ~ 85°C
Package / Case
64-VFQFN, Exposed Pad
Rf Ic Case Style
QFN
No. Of Pins
64
Supply Voltage Range
1.8V To 3.6V
Operating Temperature Range
-40°C To +85°C
Svhc
No SVHC (15-Dec-2010)
Rohs Compliant
Yes
Processor Series
ATMEGA128x
Core
AVR8
Data Bus Width
8 bit
Program Memory Type
Flash
Program Memory Size
128 KB
Data Ram Size
16 KB
Interface Type
JTAG
Maximum Clock Frequency
16 MHz
Number Of Programmable I/os
38
Number Of Timers
6
Operating Supply Voltage
1.8 V to 3.6 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWAVR, EWAVR-BL
Development Tools By Supplier
ATAVR128RFA1-EK1
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
ATMEGA128RFA1-ZU
Manufacturer:
ATMEL/爱特梅尔
Quantity:
20 000
Part Number:
ATMEGA128RFA1-ZUR
Manufacturer:
ON
Quantity:
56 000
34.10 ADC Characteristics
Table 34-10. ADC Electrical Characteristics
8266B-MCU Wireless-03/11
Symbol
V
V
V
R
REFINT1
REFINT2
REFINT3
AREF,EXT
Parameter
Internal Voltage Reference
Internal Voltage Reference
Internal Voltage Reference
External Voltage
Note:
Description
SCK to out
SCK to SS
SS
SS
Figure 34-3. SPI timing Requirements (Master Mode)
(Data Output)
Figure 34-4. SPI timing Requirements (Slave Mode)
(Data Output)
__
__
(Data Input)
(Data Input)
(CPOL = 0)
(CPOL = 1)
(CPOL = 0)
(CPOL = 1)
high to tri-state
low to SCK
MISO
MOSI
MOSI
MISO
__
SCK
SCK
SCK
SCK
1. In SPI Programming mode the minimum SCK high/low period is 2 t
SS
SS
Condition
high
MHz and 3 t
9
Mode
Slave
Slave
Slave
Slave
13
6
4
CLCL
MSB
MSB
5
MSB
MSB
for f
14
CK
Min
20
20
> 12 MHz.
15
7
...
...
...
...
Typ
15
10
ATmega128RFA1
Min
11
2
AVDD
Typ
1.5
1.6
LSB
10
1
LSB
LSB
LSB
11
2
CLCL
Max
12
6
Max
3
for f
16
8
CK
Units
V
V
V
Units
X
17
< 12
ns
ns
ns
ns
509

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