ATMEGA128RFA1-ZU Atmel, ATMEGA128RFA1-ZU Datasheet - Page 316

• Manufacturer Part Number: ATMEGA128RFA1-ZU
• Description: IC AVR MCU 2.4GHZ XCEIVER 64QFN
• Manufacturer: Atmel
• Series: ATMEGAr

Specifications of ATMEGA128RFA1-ZU

• Frequency: 2.4GHz
• Data Rate - Maximum: 2Mbps
• Modulation Or Protocol: 802.15.4 Zigbee
• Applications: General Purpose
• Power - Output: 3.5dBm
• Sensitivity: -100dBm
• Voltage - Supply: 1.8 V ~ 3.6 V
• Current - Receiving: 12.5mA
• Current - Transmitting: 14.5mA
• Data Interface: PCB, Surface Mount
• Memory Size: 128kB Flash, 4kB EEPROM, 16kB RAM
• Antenna Connector: PCB, Surface Mount
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 64-VFQFN, Exposed Pad
• Rf Ic Case Style: QFN
• No. Of Pins: 64
• Supply Voltage Range: 1.8V To 3.6V
• Operating Temperature Range: -40°C To +85°C
• Svhc: No SVHC (15-Dec-2010)
• Rohs Compliant: Yes
• Processor Series: ATMEGA128x
• Core: AVR8
• Data Bus Width: 8 bit
• Program Memory Type: Flash
• Program Memory Size: 128 KB
• Data Ram Size: 16 KB
• Interface Type: JTAG
• Maximum Clock Frequency: 16 MHz
• Number Of Programmable I/os: 38
• Number Of Timers: 6
• Operating Supply Voltage: 1.8 V to 3.6 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: EWAVR, EWAVR-BL
• Development Tools By Supplier: ATAVR128RFA1-EK1
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

316
ATmega128RFA1
includes non-inverted and inverted PWM outputs. The small horizontal line marks on
the TCNT2 slopes represent compare matches between OCR2x and TCNT2.
Figure 21-5. Phase Correct PWM Mode, Timing Diagram
The Timer/Counter Overflow Flag (TOV2) is set each time the counter reaches
BOTTOM. The Interrupt Flag can be used to generate an interrupt each time the
counter reaches the BOTTOM value.
In phase correct PWM mode, the compare unit allows generation of PWM waveforms
on the OC2x pin. Setting the COM2x1:0 bits to two will produce a non-inverted PWM.
An inverted PWM output can be generated by setting the COM2x1:0 to three. TOP is
defined as 0xFF when WGM22:0 = 3, and OCR2A when WGM22:0 = 7 (see section
"Register Description" on
only be visible on the port pin if the data direction for the port pin is set as output. The
PWM waveform is generated by clearing (or setting) the OC2x Register at the compare
match between OCR2x and TCNT2 when the counter increments, and setting (or
clearing) the OC2x Register at compare match between OCR2x and TCNT2 when the
counter decrements. The PWM frequency for the output when using phase correct
PWM can be calculated by the following equation:
The N variable represents the pre-scale factor (1, 8, 32, 64, 128, 256, or 1024).
The extreme values for the OCR2A Register represent special cases when generating
a PWM waveform output in the phase correct PWM mode. If the OCR2A is set equal to
BOTTOM, the output will be continuously low and if set equal to MAX the output will be
continuously high for non-inverted PWM mode. For inverted PWM the output will have
the opposite logic values.
At the very start of period 2 in
even though there is no Compare Match. The point of this transition is to guarantee
symmetry around BOTTOM. There are two cases that give a transition without
Compare Match.
TCNTn
OCnx
OCnx
Period
1
page 324 for register TCCR2A). The actual OC2x value will
Figure 21-5 above
f
OCnxPCPWM
2
=
N
f
clk
OCnx has a transition from high to low
⋅
_
510
I
/
O
3
8266B-MCU Wireless-03/11
OCnx Interrupt Flag Set
OCRnx Update
TOVn Interrupt Flag Set
(COMnx1:0 = 2)
(COMnx1:0 = 3)