ATMEGA128RFA1-ZU Atmel, ATMEGA128RFA1-ZU Datasheet - Page 485

• Manufacturer Part Number: ATMEGA128RFA1-ZU
• Description: IC AVR MCU 2.4GHZ XCEIVER 64QFN
• Manufacturer: Atmel
• Series: ATMEGAr

Specifications of ATMEGA128RFA1-ZU

• Frequency: 2.4GHz
• Data Rate - Maximum: 2Mbps
• Modulation Or Protocol: 802.15.4 Zigbee
• Applications: General Purpose
• Power - Output: 3.5dBm
• Sensitivity: -100dBm
• Voltage - Supply: 1.8 V ~ 3.6 V
• Current - Receiving: 12.5mA
• Current - Transmitting: 14.5mA
• Data Interface: PCB, Surface Mount
• Memory Size: 128kB Flash, 4kB EEPROM, 16kB RAM
• Antenna Connector: PCB, Surface Mount
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 64-VFQFN, Exposed Pad
• Rf Ic Case Style: QFN
• No. Of Pins: 64
• Supply Voltage Range: 1.8V To 3.6V
• Operating Temperature Range: -40°C To +85°C
• Svhc: No SVHC (15-Dec-2010)
• Rohs Compliant: Yes
• Processor Series: ATMEGA128x
• Core: AVR8
• Data Bus Width: 8 bit
• Program Memory Type: Flash
• Program Memory Size: 128 KB
• Data Ram Size: 16 KB
• Interface Type: JTAG
• Maximum Clock Frequency: 16 MHz
• Number Of Programmable I/os: 38
• Number Of Timers: 6
• Operating Supply Voltage: 1.8 V to 3.6 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: EWAVR, EWAVR-BL
• Development Tools By Supplier: ATAVR128RFA1-EK1
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

31.9.4 PROG_COMMANDS (0x5)
31.9.5 PROG_PAGELOAD (0x6)
31.9.6 PROG_PAGEREAD (0x7)
31.9.7 Data Registers
8266B-MCU Wireless-03/11
• Update-DR: The programming enable signature is compared to the correct value,
The AVR specific public JTAG instruction is used for entering programming commands
via the JTAG port. The 15-bit Programming Command Register is selected as Data
Register. The active states are the following:
• Capture-DR: The result of the previous command is loaded into the Data Register.
• Shift-DR: The Data Register is shifted by the TCK input, shifting out the result of the
• Update-DR: The programming command is applied to the Flash inputs.
• Run-Test/Idle: One clock cycle is generated, executing the applied command.
The AVR specific public JTAG instruction directly loads the Flash data page via the
JTAG port. An 8-bit Flash Data Byte Register is selected as the Data Register. This is
physically the 8 LSB’s of the Programming Command Register. The active states are
the following:
• Shift-DR: The Flash Data Byte Register is shifted by the TCK input.
• Update-DR: The content of the Flash Data Byte Register is copied into a temporary
The AVR specific public JTAG instruction directly captures the Flash content via the
JTAG port. An 8-bit Flash Data Byte Register is selected as the Data Register. This is
physically the 8 LSB’s of the Programming Command Register. The active states are
the following:
• Capture-DR: The content of the selected Flash byte is captured into the Flash Data
• Shift-DR: The Flash Data Byte Register is shifted by the TCK input.
The Data Registers are selected by the JTAG instruction registers described in section
"Programming Specific JTAG Instructions" on
for programming operations are:
• Reset Register
and Programming mode is entered if the signature is valid.
previous command and shifting in the new command.
register. A write sequence is initiated that within 11 TCK cycles loads the content of
the temporary register into the Flash page buffer. The AVR automatically alternates
between writing the low and the high byte for each new Update-DR state, starting
with the low byte for the first Update-DR encountered after entering the
PROG_PAGELOAD command. The Program Counter is pre-incremented before
writing the low byte, except for the first written byte. This ensures that the first data is
written to the address set up by PROG_COMMANDS, and loading the last location
in the page buffer does not make the program counter increment into the next page.
Byte Register. The AVR automatically alternates between reading the low and the
high byte for each new Capture-DR state, starting with the low byte for the first
Capture-DR encountered after entering the PROG_PAGEREAD command. The
Program Counter is post-incremented after reading each high byte, including the first
read byte. This ensures that the first data is captured from the first address set up by
PROG_COMMANDS, and reading the last location in the page makes the program
counter increment into the next page.
page 483. The Data Registers relevant
ATmega128RFA1
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