MCIMX281AVM4B Freescale Semiconductor, MCIMX281AVM4B Datasheet - Page 1093

• Manufacturer Part Number: MCIMX281AVM4B
• Description: IC MPU I.MX28 1.2 289MAPBGA
• Manufacturer: Freescale Semiconductor
• Series: i.MX28r

Specifications of MCIMX281AVM4B

• Core Processor: ARM9
• Core Size: 32-Bit
• Speed: 454MHz
• Connectivity: CAN, EBI/EMI, Ethernet, I²C, MMC, SmartCard, SPI, SSI, UART/USART, USB OTG
• Peripherals: DMA, I²S, LCD, POR, PWM, WDT
• Program Memory Size: 128KB (32K x 32)
• Program Memory Type: Mask ROM
• Ram Size: 32K x 32
• Voltage - Supply (vcc/vdd): 1.25 V ~ 5.25 V
• Data Converters: A/D 17x12b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 289-LFBGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Number Of I /o: -
• Eeprom Size: -
• Lead Free Status / Rohs Status: Supplier Unconfirmed

Chapter 14 External Memory Interface (EMI)
14.6.1.6 Read/Write Grouping
The memory suffers a small timing overhead when switching from read to write mode. For
efficiency, the placement queue will attempt to place a new read command sequentially
with other read commands in the command queue, or a new write command sequentially
with other write commands in the command queue. Grouping will only be possible if no
priority, source ID, write buffer or address collision rules are violated.
This feature is enabled through the rw_same_en parameter.
14.6.2 Command Execution Order After Placement
Once a command has been placed in the command queue, its order relative to the other
commands in the queue at that time is fixed. While this provides simplicity in the algorithm,
there are drawbacks. For this reason, the Memory Controller offers two options that affect
commands once they have been placed in the command queue.
14.6.2.1 Command Aging
Since commands can be inserted ahead of existing commands in the command queue, the
situation could occur where a low priority command remains at the bottom of the queue
indefinitely. To avoid such a lockout condition, aging counters have been included in the
placement logic that measure the number of cycles that each command has been waiting.
If command aging is enabled through the active_aging parameter, then if an aging counter
hits its maximum, the priority of the associated command will be decremented by one (lower
priority commands are executed first). This increases the likelihood that this command will
move to the top of the command queue and be executed. Note that this command does not
move relative positions in the command queue when it ages; the new priority will be
considered when placing new commands into the command queue.
Aging is controlled through a master aging counter and command aging counters associated
with each command in the command queue. The age_count and command_age_count
parameters hold the initial values for each of these counters, respectively. When the master
counter counts down the age_count value, a signal is sent to the command aging counters
to decrement. When the command aging counters have completely decremented, then the
priority of the associated command is decremented by one number and the counter is reset.
Therefore, a command does not age by a priority level until the total elapsed cycles has
reached the product of the age_count and command_age_count values. The maximum
number of cycles that any command can wait in the command queue until reaching the top
priority level is the product of the age_count value, the command_age_count value, and the
number of priority levels in the system.
i.MX28 Applications Processor Reference Manual, Rev. 1, 2010
Freescale Semiconductor, Inc.
1093