MCIMX281AVM4B Freescale Semiconductor, MCIMX281AVM4B Datasheet - Page 964
MCIMX281AVM4B
Manufacturer Part Number
MCIMX281AVM4B
Description
IC MPU I.MX28 1.2 289MAPBGA
Manufacturer
Freescale Semiconductor
Series
i.MX28r
Datasheets
1.MCIMX283DVM4B.pdf
(2327 pages)
2.MCIMX283DVM4B.pdf
(20 pages)
3.MCIMX281AVM4B.pdf
(72 pages)
Specifications of MCIMX281AVM4B
Core Processor
ARM9
Core Size
32-Bit
Speed
454MHz
Connectivity
CAN, EBI/EMI, Ethernet, I²C, MMC, SmartCard, SPI, SSI, UART/USART, USB OTG
Peripherals
DMA, I²S, LCD, POR, PWM, WDT
Program Memory Size
128KB (32K x 32)
Program Memory Type
Mask ROM
Ram Size
32K x 32
Voltage - Supply (vcc/vdd)
1.25 V ~ 5.25 V
Data Converters
A/D 17x12b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
289-LFBGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Number Of I /o
-
Eeprom Size
-
Lead Free Status / Rohs Status
Supplier Unconfirmed
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Program Image
EXPAND_UINT32(0x800e0000 + 181 * 4), EXPAND_UINT32(0x00320032),
//
//0_000000000000000 mr1_data_1(RW) 0_000000000000000 mr1_data_0(RW)
EXPAND_UINT32(0x800e0000 + 183 * 4), EXPAND_UINT32(0x00000000),
//
EXPAND_UINT32(0x800e0000 + 189 * 4), EXPAND_UINT32(0xffffffff),
//
WRT_DAT(0, HAB_DATA_WIDTH_WORD, 0x800e0044, 0x00000000),
//
WRT_DAT(0, HAB_DATA_WIDTH_WORD, 0x800e0040, 0x00000001),
// temp = HW_DRAM_CTL58_RD();
// while ( (temp & 0x00100000) != 0x00100000 ){
// temp = HW_DRAM_CTL58_RD();
CHK_DAT_FOREVER(HAB_CMD_CHK_DAT_SET, HAB_DATA_WIDTH_WORD, 0x800e00e8, 0x00100000),
// Now try to write something to ddr addresses 0x40200000 and 0x40200400
WRT_DAT(0, HAB_DATA_WIDTH_WORD, 0x40200000, 0xAAAAAAAA),
WRT_DAT(0, HAB_DATA_WIDTH_WORD, 0x40200400, 0x12345678),
// Verify above two writes to ddr addresses
CHK_DAT_FOREVER(HAB_CMD_CHK_DAT_SET, HAB_DATA_WIDTH_WORD, 0x40200000, 0xAAAAAAAA),
CHK_DAT_FOREVER(HAB_CMD_CHK_DAT_SET, HAB_DATA_WIDTH_WORD, 0x40200400, 0x12345678),
};
12.6.2.1 Write Data Command
The Write Data Command is used to write a list of given 1, 2 or 4-byte values or bitmasks
to a corresponding list of target addresses. The format of Write Data Command, again a big
endian byte array, is shown in the
where:
964
Tag
• Tag: A single byte field set to 0xCC
• Length:
• Address: Target address to which the data should be written
• Value/Mask: Data value or bit mask to be written to the preceding address
A two byte field in big endian format containing the length of the Write Data Command,
in bytes, including the header.
Length
[Value/Mask]
[Value/Mask]
Value/Mask
DRAM_REG[183] =
DRAM_REG[189] =
[Address]
[Address]
Address
HW_DRAM_CTL17.B.SREFRESH = 0;
HW_DRAM_CTL16_SET(0x00000001);
...
Parameter
i.MX28 Applications Processor Reference Manual, Rev. 1, 2010
0x00000000;
0xffffffff;
Table 12-15. Write Data Command Format
//Wait for EMI initialization completed
Write Data Command
//set "start"
table below.
Freescale Semiconductor, Inc.
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