MCIMX281AVM4B Freescale Semiconductor, MCIMX281AVM4B Datasheet - Page 1843

• Manufacturer Part Number: MCIMX281AVM4B
• Description: IC MPU I.MX28 1.2 289MAPBGA
• Manufacturer: Freescale Semiconductor
• Series: i.MX28r

Specifications of MCIMX281AVM4B

• Core Processor: ARM9
• Core Size: 32-Bit
• Speed: 454MHz
• Connectivity: CAN, EBI/EMI, Ethernet, I²C, MMC, SmartCard, SPI, SSI, UART/USART, USB OTG
• Peripherals: DMA, I²S, LCD, POR, PWM, WDT
• Program Memory Size: 128KB (32K x 32)
• Program Memory Type: Mask ROM
• Ram Size: 32K x 32
• Voltage - Supply (vcc/vdd): 1.25 V ~ 5.25 V
• Data Converters: A/D 17x12b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 289-LFBGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Number Of I /o: -
• Eeprom Size: -
• Lead Free Status / Rohs Status: Supplier Unconfirmed

Freescale Semiconductor, Inc.
800F_82CC
800F_82DC
800F_82EC
800F_82FC
800F_82C0
800F_82C4
800F_82C8
800F_82D0
800F_82D4
800F_82D8
800F_82E0
800F_82E4
800F_82E8
800F_830C
800F_82F0
800F_82F4
800F_82F8
800F_8300
800F_8304
800F_8308
800F_8310
Absolute
address
(hex)
ENET SWI VLAN domain resolution entry 16.
(HW_ENET_SWI_VLAN_RES_TABLE_16)
ENET SWI VLAN domain resolution entry 17.
(HW_ENET_SWI_VLAN_RES_TABLE_17)
ENET SWI VLAN domain resolution entry 18.
(HW_ENET_SWI_VLAN_RES_TABLE_18)
ENET SWI VLAN domain resolution entry 19.
(HW_ENET_SWI_VLAN_RES_TABLE_19)
ENET SWI VLAN domain resolution entry 20.
(HW_ENET_SWI_VLAN_RES_TABLE_20)
ENET SWI VLAN domain resolution entry 21.
(HW_ENET_SWI_VLAN_RES_TABLE_21)
ENET SWI VLAN domain resolution entry 22.
(HW_ENET_SWI_VLAN_RES_TABLE_22)
ENET SWI VLAN domain resolution entry 23.
(HW_ENET_SWI_VLAN_RES_TABLE_23)
ENET SWI VLAN domain resolution entry 24.
(HW_ENET_SWI_VLAN_RES_TABLE_24)
ENET SWI VLAN domain resolution entry 25.
(HW_ENET_SWI_VLAN_RES_TABLE_25)
ENET SWI VLAN domain resolution entry 26.
(HW_ENET_SWI_VLAN_RES_TABLE_26)
ENET SWI VLAN domain resolution entry 27.
(HW_ENET_SWI_VLAN_RES_TABLE_27)
ENET SWI VLAN domain resolution entry 28.
(HW_ENET_SWI_VLAN_RES_TABLE_28)
ENET SWI VLAN domain resolution entry 29.
(HW_ENET_SWI_VLAN_RES_TABLE_29)
ENET SWI VLAN domain resolution entry 30.
(HW_ENET_SWI_VLAN_RES_TABLE_30)
ENET SWI VLAN domain resolution entry 31.
(HW_ENET_SWI_VLAN_RES_TABLE_31)
ENET SWI Total number of incoming frames processed
(HW_ENET_SWI_TOTAL_DISC)
ENET SWI Sum of bytes of frames counted in TOTAL_DISC
(HW_ENET_SWI_TOTAL_BYT_DISC)
ENET SWI Total number of incoming frames processed
(HW_ENET_SWI_TOTAL_FRM)
ENET SWI Sum of bytes of frames counted in TOTAL_FRM
(HW_ENET_SWI_TOTAL_BYT_FRM)
ENET SWI Port 0 Outgoing frames discarded due to output
Queue congestion (HW_ENET_SWI_ODISC0)
i.MX28 Applications Processor Reference Manual, Rev. 1, 2010
HW_ENET_SWI memory map (continued)
Register name
Chapter 29 Programmable 3-Port Ethernet Switch with QOS (SWITCH)
(in bits)
Width
32
32
32
32
32
32
32
32
32
32
32
32
32
32
32
32
32
32
32
32
32
Access
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R
R
R
R
R
Reset value
0000_0000h
0000_0000h
0000_0000h
0000_0000h
0000_0000h
0000_0000h
0000_0000h
0000_0000h
0000_0000h
0000_0000h
0000_0000h
0000_0000h
0000_0000h
0000_0000h
0000_0000h
0000_0000h
0000_0000h
0000_0000h
0000_0000h
0000_0000h
0000_0000h
29.9.76/1910
29.9.77/1911
29.9.78/1912
29.9.79/1912
29.9.80/1913
29.9.81/1914
29.9.82/1914
29.9.83/1915
29.9.84/1916
29.9.85/1916
29.9.86/1917
29.9.87/1918
29.9.88/1918
29.9.89/1919
29.9.90/1920
29.9.91/1920
29.9.92/1921
29.9.93/1921
29.9.94/1922
29.9.95/1922
29.9.96/1923
Section/
page
1843