MCIMX281AVM4B Freescale Semiconductor, MCIMX281AVM4B Datasheet - Page 148
MCIMX281AVM4B
Manufacturer Part Number
MCIMX281AVM4B
Description
IC MPU I.MX28 1.2 289MAPBGA
Manufacturer
Freescale Semiconductor
Series
i.MX28r
Datasheets
1.MCIMX283DVM4B.pdf
(2327 pages)
2.MCIMX283DVM4B.pdf
(20 pages)
3.MCIMX281AVM4B.pdf
(72 pages)
Specifications of MCIMX281AVM4B
Core Processor
ARM9
Core Size
32-Bit
Speed
454MHz
Connectivity
CAN, EBI/EMI, Ethernet, I²C, MMC, SmartCard, SPI, SSI, UART/USART, USB OTG
Peripherals
DMA, I²S, LCD, POR, PWM, WDT
Program Memory Size
128KB (32K x 32)
Program Memory Type
Mask ROM
Ram Size
32K x 32
Voltage - Supply (vcc/vdd)
1.25 V ~ 5.25 V
Data Converters
A/D 17x12b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
289-LFBGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Number Of I /o
-
Eeprom Size
-
Lead Free Status / Rohs Status
Supplier Unconfirmed
- Current page: 148 of 2327
- Download datasheet (17Mb)
Programmable Registers
5.4.1 Interrupt Collector Interrupt Vector Address Register
This register is read by the Interrupt Service Routine using a load PC instruction. The priority
logic presents the vector address of the next IRQ interrupt to be processed by the CPU. The
vector address is held until a new ISR is entered..
HW_ICOLL_VECTOR: 0x000
HW_ICOLL_VECTOR_SET: 0x004
HW_ICOLL_VECTOR_CLR: 0x008
HW_ICOLL_VECTOR_TOG: 0x00C
This register mediates the vectored interrupt collectors interface with the CPU when it enters
the IRQ exception trap. The exception trap should have a LDPC instruction from this address.
EXAMPLE
LDPC
Address:
148
Reset
8000_1160
8000_1170
8000_1180
8000_1190
8000_11E0
Absolute
address
Bit
W
(hex)
R
HW_ICOLL_VECTOR_ADDR; IRQ exception at 0xffff0018
31
0
(HW_ICOLL_VECTOR)
HW_ICOLL_VECTOR
Interrupt Collector Debug Read Request Register 0
(HW_ICOLL_DBGREQUEST0)
Interrupt Collector Debug Read Request Register 1
(HW_ICOLL_DBGREQUEST1)
Interrupt Collector Debug Read Request Register 2
(HW_ICOLL_DBGREQUEST2)
Interrupt Collector Debug Read Request Register 3
(HW_ICOLL_DBGREQUEST3)
Interrupt Collector Version Register (HW_ICOLL_VERSION)
30
0
29
0
i.MX28 Applications Processor Reference Manual, Rev. 1, 2010
28
0
HW_ICOLL memory map (continued)
Register name
8000_0000h base + 0h offset = 8000_0000h
27
0
26
0
25
0
IRQVECTOR[31:16]
24
0
23
0
22
0
(in bits)
Width
32
32
32
32
32
21
0
Access
R
R
R
R
R
20
0
Freescale Semiconductor, Inc.
Reset value
0000_0000h
0000_0000h
0000_0000h
0000_0000h
0301_0000h
19
0
18
0
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17
0
Section/
page
16
0
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