MCIMX281AVM4B Freescale Semiconductor, MCIMX281AVM4B Datasheet - Page 2232
MCIMX281AVM4B
Manufacturer Part Number
MCIMX281AVM4B
Description
IC MPU I.MX28 1.2 289MAPBGA
Manufacturer
Freescale Semiconductor
Series
i.MX28r
Datasheets
1.MCIMX283DVM4B.pdf
(2327 pages)
2.MCIMX283DVM4B.pdf
(20 pages)
3.MCIMX281AVM4B.pdf
(72 pages)
Specifications of MCIMX281AVM4B
Core Processor
ARM9
Core Size
32-Bit
Speed
454MHz
Connectivity
CAN, EBI/EMI, Ethernet, I²C, MMC, SmartCard, SPI, SSI, UART/USART, USB OTG
Peripherals
DMA, I²S, LCD, POR, PWM, WDT
Program Memory Size
128KB (32K x 32)
Program Memory Type
Mask ROM
Ram Size
32K x 32
Voltage - Supply (vcc/vdd)
1.25 V ~ 5.25 V
Data Converters
A/D 17x12b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
289-LFBGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Number Of I /o
-
Eeprom Size
-
Lead Free Status / Rohs Status
Supplier Unconfirmed
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Programmable Registers
36.3.3 SPDIF Frame Control Register (HW_SPDIF_FRAMECTRL)
HW_SPDIF_FRAMECTRL: 0x020
HW_SPDIF_FRAMECTRL_SET: 0x024
HW_SPDIF_FRAMECTRL_CLR: 0x028
HW_SPDIF_FRAMECTRL_TOG: 0x02C
The SPDIF Frame Control Register provides direct control of the control bits transmitted
over an SPDIF frame.
EXAMPLE
HW_SPDIF_FRAMECTRL.COPY=1 //SPDIF frame contains copyrighted material
2232
Reset
END_XFER
PRESENT
Bit
W
RSRVD1
R
Field
30 1
31
0
15
0
14
0
This bit is set to 1 in products in which SPDIF is present.
Reserved
When set, indicates that the SPDIF module has completed transfer of all data, including data stored in
internal FIFOs. Used in conjunction with HW_SPDIF_CTRL_WAIT_END_XFER.
13
0
i.MX28 Applications Processor Reference Manual, Rev. 1, 2010
12
0
HW_SPDIF_STAT field descriptions
11
0
10
0
0
9
RSRVD1[15:1]
0
8
Description
0
7
0
6
5
0
4
0
Freescale Semiconductor, Inc.
0
3
0
2
0
1
0
0
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