MCIMX281AVM4B Freescale Semiconductor, MCIMX281AVM4B Datasheet - Page 2147
MCIMX281AVM4B
Manufacturer Part Number
MCIMX281AVM4B
Description
IC MPU I.MX28 1.2 289MAPBGA
Manufacturer
Freescale Semiconductor
Series
i.MX28r
Datasheets
1.MCIMX283DVM4B.pdf
(2327 pages)
2.MCIMX283DVM4B.pdf
(20 pages)
3.MCIMX281AVM4B.pdf
(72 pages)
Specifications of MCIMX281AVM4B
Core Processor
ARM9
Core Size
32-Bit
Speed
454MHz
Connectivity
CAN, EBI/EMI, Ethernet, I²C, MMC, SmartCard, SPI, SSI, UART/USART, USB OTG
Peripherals
DMA, I²S, LCD, POR, PWM, WDT
Program Memory Size
128KB (32K x 32)
Program Memory Type
Mask ROM
Ram Size
32K x 32
Voltage - Supply (vcc/vdd)
1.25 V ~ 5.25 V
Data Converters
A/D 17x12b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
289-LFBGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Number Of I /o
-
Eeprom Size
-
Lead Free Status / Rohs Status
Supplier Unconfirmed
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The resulting image is shown below. The text is rendered in a transparent overlay (overlay
#2) on the right side of the screen. The background color (#000040) is dark blue and shows
through the overlay as the background color. Overlay #3 applies a thin white alpha-blended
border around the image to frame it. Overlays #0 and #1 generate the Next> and <Prev
images alpha blended onto the image. Because these overlays are higher priority (lower
numbered) than the border, they are used at these locations instead of overlay #3.
34.4 Programmable Registers
PXP Hardware Register Format Summary
Freescale Semiconductor, Inc.
8002_A000
8002_A010
8002_A020
8002_A030
Absolute
address
(hex)
Figure 34-19. Example: Downscale VGA to QVGA with Overlapping Overlays
Register
CTRL
PXP Control Register 0 (HW_PXP_CTRL)
PXP Status Register (HW_PXP_STAT)
Output Frame Buffer Pointer (HW_PXP_OUTBUF)
Output Frame Buffer Pointer #2 (HW_PXP_OUTBUF2)
i.MX28 Applications Processor Reference Manual, Rev. 1, 2010
Register name
0x000C9003
Value
HW_PXP memory map
(in bits)
Width
32
32
32
32
(YUV420) IRQ_ENABLE=1
S0_FORMAT=9
Access
Description
ENABLE=1
SCALE=1
R/W
R/W
R/W
R/W
CROP=1
Chapter 34 Pixel Pipeline (PXP)
C000_0000h
Reset value
0000_0000h
0000_0000h
0000_0000h
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