MCIMX281AVM4B Freescale Semiconductor, MCIMX281AVM4B Datasheet - Page 2173
MCIMX281AVM4B
Manufacturer Part Number
MCIMX281AVM4B
Description
IC MPU I.MX28 1.2 289MAPBGA
Manufacturer
Freescale Semiconductor
Series
i.MX28r
Datasheets
1.MCIMX283DVM4B.pdf
(2327 pages)
2.MCIMX283DVM4B.pdf
(20 pages)
3.MCIMX281AVM4B.pdf
(72 pages)
Specifications of MCIMX281AVM4B
Core Processor
ARM9
Core Size
32-Bit
Speed
454MHz
Connectivity
CAN, EBI/EMI, Ethernet, I²C, MMC, SmartCard, SPI, SSI, UART/USART, USB OTG
Peripherals
DMA, I²S, LCD, POR, PWM, WDT
Program Memory Size
128KB (32K x 32)
Program Memory Type
Mask ROM
Ram Size
32K x 32
Voltage - Supply (vcc/vdd)
1.25 V ~ 5.25 V
Data Converters
A/D 17x12b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
289-LFBGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Number Of I /o
-
Eeprom Size
-
Lead Free Status / Rohs Status
Supplier Unconfirmed
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34.4.26 PXP Overlay 0 Size (HW_PXP_OL0SIZE)
This register contains buffer size/location information for the Overlay 0 input buffer.
This register contains information about Overlay 0 indicating the size of the overlay (in
NxN blocks) and the overlay's location within the output frame buffer (in NxN blocks). In
16 pixel block size mode, only the low 7 bits of each field can be used and the most
significant bit must be set to 0.
EXAMPLE
HW_PXP_OLnSIZE_WR(0,0x10000401); // 32x8 overlay at offset +128+0
Address:
Re-
34.4.27 PXP Overlay 0 Parameters (HW_PXP_OL0PARAM)
This register contains buffer parameters for the Overlay 0 input buffer.
The S1 Overlay 0 Parameter register provides additional controls for Overlay 0.
EXAMPLE
u32 olparam;
Freescale Semiconductor, Inc.
set
Bit
W
R
31
0
HEIGHT
XBASE
YBASE
WIDTH
31 24
23 16
Field
15 8
7 0
olparam
olparam |= BF_PXP_OLnPARAM_ALPHA_CNTL(BV_PXP_OLnPARAM_ALPHA_CNTL__ROPs);
olparam |= BF_PXP_OLnPARAM_FORMAT
30
0
29
0
HW_PXP_OL0SIZE
XBASE
28
0
This field indicates the X-coordinate (in blocks) of the top-left NxN block in the overlay within the output
frame buffer.
This field indicates the Y-coordinate (in blocks) of the top-left NxN block in the overlay within the output
frame buffer.
Indicates number of horizontal NxN blocks in the image (non-rotated).
Indicates the number of vertical NxN blocks in the image (non-rotated).
27
= BF_PXP_OLnPARAM_ENABLE
0
26
0
i.MX28 Applications Processor Reference Manual, Rev. 1, 2010
25
0
24
0
23
0
HW_PXP_OL0SIZE field descriptions
8002_A000h base + 210h offset = 8002_A210h
22
0
21
0
YBASE
20
0
19
0
18
0
(1);
(BV_PXP_OLnPARAM_FORMAT__ARGB8888);
17
0
16
0
15
0
Description
14
0
13
0
WIDTH
12
0
11
0
10
0
0
9
Chapter 34 Pixel Pipeline (PXP)
0
8
0
7
0
6
0
5
HEIGHT
0
4
3
0
0
2
0
1
2173
0
0
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