MCIMX281AVM4B Freescale Semiconductor, MCIMX281AVM4B Datasheet - Page 1280

• Manufacturer Part Number: MCIMX281AVM4B
• Description: IC MPU I.MX28 1.2 289MAPBGA
• Manufacturer: Freescale Semiconductor
• Series: i.MX28r

Specifications of MCIMX281AVM4B

• Core Processor: ARM9
• Core Size: 32-Bit
• Speed: 454MHz
• Connectivity: CAN, EBI/EMI, Ethernet, I²C, MMC, SmartCard, SPI, SSI, UART/USART, USB OTG
• Peripherals: DMA, I²S, LCD, POR, PWM, WDT
• Program Memory Size: 128KB (32K x 32)
• Program Memory Type: Mask ROM
• Ram Size: 32K x 32
• Voltage - Supply (vcc/vdd): 1.25 V ~ 5.25 V
• Data Converters: A/D 17x12b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 289-LFBGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Number Of I /o: -
• Eeprom Size: -
• Lead Free Status / Rohs Status: Supplier Unconfirmed

Programming the BCH/GPMI Interfaces
16.4.2.1 DMA Structure Code Example
The following sample code illustrates the coding for one read transaction, consisting of a
seven DMA command structure chain for reading all 4096 bytes of payload data (eight
512-byte blocks) and 65 bytes of metadata with the associative parity bytes (8 * (18) + 9)
from a 4K NAND page sitting on GPMI CS2.
//----------------------------------------------------------------------------
1280
HW_GPMI_ECCCOUNT<=
HW_GPMI_COMPARE <=
HW_GPMI_COMPARE <=
HW_GPMI_COMPARE <=
HW_GPMI_ECCCTRL <=
HW_GPMI_ECCCTRL <=
HW_GPMI_ECCCTRL <=
HW_GPMI_CTRL0
HW_GPMI_CTRL0
HW_GPMI_CTRL0
HW_GPMI_CTRL0
HW_GPMI_CTRL0
i.MX28 Applications Processor Reference Manual, Rev. 1, 2010
CMD
CMD
CMD
CMD
CMD
CMD
CMD
Figure 16-10. BCH Decode DMA Descriptor Chain
Descriptor 1: Disable BCH engine and issue NAND read set-up command and address (CLE/ALE).
<=
<=
<=
<=
<=
<=
<=
<=
<=
<=
<=
<=
Descriptor 6: Disable BCH engine (wait for ready is a NOP here).
Descriptor 7: NOP to ensure NANDLOCK in previous descriptor .
wait_for_ready
wait_for_ready
Descriptor 5: Enable BCH engine and read NAND data.
Descriptor 2: NAND read execute command (CLE).
Descriptor 4: PSENSE compare for time-out.
read
1 + 5
write
write
1
0
0
0
0
0
Descriptor 3: Wait for NAND ready.
decode_8_bit
HW_GPMI_AUXILIARY
HW_GPMI_PAYLOAD
----
----
NEXT CMD ADDR
NEXT CMD ADDR
NEXT CMD ADDR
NEXT CMD ADDR
NEXT CMD ADDR
NEXT CMD ADDR
NEXT CMD ADDR
null
null
null
BUFFER ADDR
BUFFER ADDR
BUFFER ADDR
BUFFER ADDR
BUFFER ADDR
BUFFER ADDR
BUFFER ADDR
8_bit enabled 2
8_bit disabled 2 NAND_DATA
8_bit disabled 2 NAND_DATA
8_bit
8_bit disabled 2
_
3
1
1
0
6
3
0
disabled 0 NAND_DATA
4096+218 (flash page size)
1
1
1
0
1
1
0
0
0
0
0
0
0
0
NAND_CLE
NAND_CLE 0
disable
disable
enable
0
0
0
0
1
1
0
1 0 1
1
1 0 1
0 0 1 NO_DMA_XFER
0
0 0 1
1 0 1 NO_DMA_XFER
0
1 0 1 NO_DMA_XFER
0
0 0 0 NO_DMA_XFER
null
null
null
4096+218
DMA_SENSE
DMA_READ
DMA_READ
1 + 5
0
0x1FF
0
1
----
----
Freescale Semiconductor, Inc.
1 Byte NAND CMD
1 Byte NAND CMD
412 Byte Auxiliary
Descriptor Chain
8*512 Byte Data
Payload Buffer
Payload Buffer
5 Byte ADDR
DMA Error