MCIMX281AVM4B Freescale Semiconductor, MCIMX281AVM4B Datasheet - Page 1449
MCIMX281AVM4B
Manufacturer Part Number
MCIMX281AVM4B
Description
IC MPU I.MX28 1.2 289MAPBGA
Manufacturer
Freescale Semiconductor
Series
i.MX28r
Datasheets
1.MCIMX283DVM4B.pdf
(2327 pages)
2.MCIMX283DVM4B.pdf
(20 pages)
3.MCIMX281AVM4B.pdf
(72 pages)
Specifications of MCIMX281AVM4B
Core Processor
ARM9
Core Size
32-Bit
Speed
454MHz
Connectivity
CAN, EBI/EMI, Ethernet, I²C, MMC, SmartCard, SPI, SSI, UART/USART, USB OTG
Peripherals
DMA, I²S, LCD, POR, PWM, WDT
Program Memory Size
128KB (32K x 32)
Program Memory Type
Mask ROM
Ram Size
32K x 32
Voltage - Supply (vcc/vdd)
1.25 V ~ 5.25 V
Data Converters
A/D 17x12b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
289-LFBGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Number Of I /o
-
Eeprom Size
-
Lead Free Status / Rohs Status
Supplier Unconfirmed
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20.4.28 Shadow Register for OTP Bank3 Word1 (ROM Use 1)
Copied from the OTP automatically after reset. Can be re-loaded by setting
HW_OCOTP_CTRL[RELOAD_SHADOWS].
Shadowed memory mapped access to OTP Bank 3, word 1 (ADDR = 0x19).
Address:
Freescale Semiconductor, Inc.
Reset
Reset
UNENCRYPTED_
DEBUG_UART_
RECOVERY_
USE_ALT_
Bit
Bit
DISABLE_
W
W
ENABLE_
R
R
RSRVD0
MODE
BOOT
PINS
Field
1 0
4
3
2
31
15
RSRVD2
0
0
HW_OCOTP_ROM1
(HW_OCOTP_ROM1)
30
14
0
0
Blow to enable unencrypted boot modes.
Reserved - do not blow this bit.
Blow to disable recovery boot mode.
00-PWM; 01-AUART0; 10-I2C0; 11-Reserved;
29
13
0
0
i.MX28 Applications Processor Reference Manual, Rev. 1, 2010
HW_OCOTP_ROM0 field descriptions (continued)
28
12
0
0
8002_C000h base + 1B0h offset = 8002_C1B0h
BOOT_SEARCH_COUNT
27
11
0
0
26
10
0
0
25
0
0
9
24
0
0
8
Description
BOOT_SEARCH_STRIDE
23
0
0
7
22
0
0
6
Chapter 20 On-Chip OTP (OCOTP) Controller
21
0
5
0
20
0
4
0
19
0
0
3
18
0
0
2
NUMBER_OF_
NANDS
17
0
0
1
1449
16
0
0
0
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