MCIMX281AVM4B Freescale Semiconductor, MCIMX281AVM4B Datasheet - Page 482

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MCIMX281AVM4B

Manufacturer Part Number
MCIMX281AVM4B
Description
IC MPU I.MX28 1.2 289MAPBGA
Manufacturer
Freescale Semiconductor
Series
i.MX28r
Datasheets

Specifications of MCIMX281AVM4B

Core Processor
ARM9
Core Size
32-Bit
Speed
454MHz
Connectivity
CAN, EBI/EMI, Ethernet, I²C, MMC, SmartCard, SPI, SSI, UART/USART, USB OTG
Peripherals
DMA, I²S, LCD, POR, PWM, WDT
Program Memory Size
128KB (32K x 32)
Program Memory Type
Mask ROM
Ram Size
32K x 32
Voltage - Supply (vcc/vdd)
1.25 V ~ 5.25 V
Data Converters
A/D 17x12b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
289-LFBGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Number Of I /o
-
Eeprom Size
-
Lead Free Status / Rohs Status
Supplier Unconfirmed
Programmable Registers
Because channel 14 is not assigned to any peripheral, this register is of no practical usage
and just reserved for compatibility.
Address:
Re-
6.5.108 APBH DMA channel 14 Command Register
The APBH DMA channel 14 command register specifies the cycle to perform for the current
command chain item.
Because channel 14 is not assigned to any peripheral, this register is of no practical usage
and just reserved for compatibility.
Address:
482
set
Reset
Bit
W
R
CMD_ADDR
Bit
31
W
0
R
Field
31 0
30
0
31
0
29
0
HW_APBH_CH14_CMD
HW_APBH_CH14_NXTCMDAR 8000_4000h base + 730h offset = 8000_4730h
(HW_APBH_CH14_CMD)
28
0
30
0
Pointer to next command structure for channel 14.
27
0
26
0
29
0
i.MX28 Applications Processor Reference Manual, Rev. 1, 2010
25
0
HW_APBH_CH14_NXTCMDAR field descriptions
24
0
28
0
23
0
22
0
27
0
8000_4000h base + 740h offset = 8000_4740h
21
0
20
0
26
0
19
0
18
25
0
0
17
CMD_ADDR
0
XFER_COUNT
16
24
0
0
15
0
Description
23
14
0
0
13
0
22
12
0
0
11
0
21
0
10
0
0
9
20
0
0
8
Freescale Semiconductor, Inc.
0
7
19
0
0
6
0
5
18
0
0
4
3
0
17
0
0
2
0
1
16
0
0
0

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