MCIMX281AVM4B Freescale Semiconductor, MCIMX281AVM4B Datasheet - Page 121
MCIMX281AVM4B
Manufacturer Part Number
MCIMX281AVM4B
Description
IC MPU I.MX28 1.2 289MAPBGA
Manufacturer
Freescale Semiconductor
Series
i.MX28r
Datasheets
1.MCIMX283DVM4B.pdf
(2327 pages)
2.MCIMX283DVM4B.pdf
(20 pages)
3.MCIMX281AVM4B.pdf
(72 pages)
Specifications of MCIMX281AVM4B
Core Processor
ARM9
Core Size
32-Bit
Speed
454MHz
Connectivity
CAN, EBI/EMI, Ethernet, I²C, MMC, SmartCard, SPI, SSI, UART/USART, USB OTG
Peripherals
DMA, I²S, LCD, POR, PWM, WDT
Program Memory Size
128KB (32K x 32)
Program Memory Type
Mask ROM
Ram Size
32K x 32
Voltage - Supply (vcc/vdd)
1.25 V ~ 5.25 V
Data Converters
A/D 17x12b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
289-LFBGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Number Of I /o
-
Eeprom Size
-
Lead Free Status / Rohs Status
Supplier Unconfirmed
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Based on these settings, MPTE0 spans 2
LOC value is specified, the DFLPT must generate section base-address values for each
location in the span as a linear offset to the base LOC. Even though this represents some
constraint in the view of virtual-to-physical memory mapping, it is quite common in an
embedded system to have large chunks of virtual memory to be contiguous.
The table below lists the page-table entries available in the DFLPT.
Freescale Semiconductor, Inc.
• HW_DIGCTL_MPTE0_LOC = 0x700
• TTB (0xBASE) = 0x800C_0000
@0x800C3FFC
@0x800C1C0C
@0x800C1C08
@0x800C1C04
@0x800C1C00
Address
@0x800C0000
Table Base
Translation
FLPT
Register
AR926
MMU
0x000XXXXX
i.MX28 Applications Processor Reference Manual, Rev. 1, 2010
0xFFFXXXXX
0x701XXXXX
0x700XXXXX
0x703XXXXX
0x702XXXXX
Address
Virtual
Figure 3-3. DFLPT Virtual Memory Map
available for MPTE1 15
available for MPTE1 15
available for MPTE1 15
(non-cacheable, V==R)
MPTE0_LOC=0x700,
Base-address=0x703
Base-address=0x702
Base-address=0x701
PTE 0x801 0xFFF
PTE 0x900 0xFFF
PTE 0x000 0x6FF
MPTE0_SPAN=2
-
PTE 2048
2
=4 entries in the page table. Because only one
Returns Base-address = LOC, DFLPT returns value MPTE0
PIO
MPTE0 with base of 0x700 and span of 2^SPAN = 4,
Automatically return Base-address = LOC + 3,
Automatically return Base-address = LOC + 2,
Automatically return Base-address = LOC + 1,
DFLPT returns value (MPTE0 + (1 << 20))
DFLPT returns value (MPTE0 + (2 << 20))
DFLPT returns value (MPTE0 + (3 << 20))
Chapter 3 Default First-level Page Table (DFLPT)
121
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