MCIMX281AVM4B Freescale Semiconductor, MCIMX281AVM4B Datasheet - Page 827
MCIMX281AVM4B
Manufacturer Part Number
MCIMX281AVM4B
Description
IC MPU I.MX28 1.2 289MAPBGA
Manufacturer
Freescale Semiconductor
Series
i.MX28r
Datasheets
1.MCIMX283DVM4B.pdf
(2327 pages)
2.MCIMX283DVM4B.pdf
(20 pages)
3.MCIMX281AVM4B.pdf
(72 pages)
Specifications of MCIMX281AVM4B
Core Processor
ARM9
Core Size
32-Bit
Speed
454MHz
Connectivity
CAN, EBI/EMI, Ethernet, I²C, MMC, SmartCard, SPI, SSI, UART/USART, USB OTG
Peripherals
DMA, I²S, LCD, POR, PWM, WDT
Program Memory Size
128KB (32K x 32)
Program Memory Type
Mask ROM
Ram Size
32K x 32
Voltage - Supply (vcc/vdd)
1.25 V ~ 5.25 V
Data Converters
A/D 17x12b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
289-LFBGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Number Of I /o
-
Eeprom Size
-
Lead Free Status / Rohs Status
Supplier Unconfirmed
- Current page: 827 of 2327
- Download datasheet (17Mb)
Address:
Re-
9.4.74 PINCTRL Bank 1 Interrupt Polarity Register
The PINCTRL Bank 1 Interrupt Polarity Register selects the polarity for interrupt requests
for the pins in bank 1.
HW_PINCTRL_IRQPOL1: 0x1310
HW_PINCTRL_IRQPOL1_SET: 0x1314
HW_PINCTRL_IRQPOL1_CLR: 0x1318
HW_PINCTRL_IRQPOL1_TOG: 0x131C
This register selects the polarity for interrupt generation. Each pin in bank 1 which is
configured for interrupt generation can be independently set to interrupt on low level, high
level, rising edge, or falling edge by setting this register and HW_PINCTRL_IRQLEVEL1
(see above) appropriately.
Address:
Re-
Freescale Semiconductor, Inc.
set
set
Bit
Bit
W
W
R
R
31
31
RSRVD1
RSRVD1
0
0
IRQPOL
31 29
Field
28 0
30
30
0
0
29
29
0
0
(HW_PINCTRL_IRQPOL1)
HW_PINCTRL_IRQPOL0
HW_PINCTRL_IRQPOL1
28
28
0
0
Empty Description.
Each bit in this register corresponds to one of the 29 pins in bank 0:
0= Low or falling edge;
1= High or rising edge.
27
27
0
0
26
26
0
0
i.MX28 Applications Processor Reference Manual, Rev. 1, 2010
25
25
0
0
24
24
0
0
HW_PINCTRL_IRQPOL0 field descriptions
23
23
0
0
22
22
0
0
21
21
8001_8000h base + 1300h offset = 8001_9300h
0
8001_8000h base + 1310h offset = 8001_9310h
0
20
20
0
0
19
19
0
0
18
18
0
0
17
17
0
0
IRQPOL
16
16
0
0
15
15
0
0
IRQPOL
Description
14
14
0
0
13
13
0
0
12
12
0
0
11
11
0
0
Chapter 9 Pin Control and GPIO (PinCtrl)
10
10
0
0
0
0
9
9
0
0
8
8
0
0
7
7
0
0
6
6
0
0
5
5
0
0
4
4
3
0
3
0
0
0
2
2
0
0
1
1
827
0
0
0
0
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