MCIMX281AVM4B Freescale Semiconductor, MCIMX281AVM4B Datasheet - Page 122

• Manufacturer Part Number: MCIMX281AVM4B
• Description: IC MPU I.MX28 1.2 289MAPBGA
• Manufacturer: Freescale Semiconductor
• Series: i.MX28r

Specifications of MCIMX281AVM4B

• Core Processor: ARM9
• Core Size: 32-Bit
• Speed: 454MHz
• Connectivity: CAN, EBI/EMI, Ethernet, I²C, MMC, SmartCard, SPI, SSI, UART/USART, USB OTG
• Peripherals: DMA, I²S, LCD, POR, PWM, WDT
• Program Memory Size: 128KB (32K x 32)
• Program Memory Type: Mask ROM
• Ram Size: 32K x 32
• Voltage - Supply (vcc/vdd): 1.25 V ~ 5.25 V
• Data Converters: A/D 17x12b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 289-LFBGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Number Of I /o: -
• Eeprom Size: -
• Lead Free Status / Rohs Status: Supplier Unconfirmed

Operation
122
PTE_2048
MPTE15
MPTE14
MPTE13
MPTE12
MPTE11
MPTE10
GISTER
MPTE9
MPTE8
MPTE7
MPTE6
MPTE5
MPTE4
MPTE3
MPTE2
MPTE1
MPTE0
NAME
RE-
0x800C0000 + (HW_DIGCTL_MPTE15_LOC <<2) <= Address
< 0x800C0000 + ((HW_DIGCTL_MPTE15_LOC + 2^SPAN)<<2)
0x800C0000 + (HW_DIGCTL_MPTE14_LOC <<2) <= Address
< 0x800C0000 + ((HW_DIGCTL_MPTE14_LOC + 2^SPAN)<<2)
0x800C0000 + (HW_DIGCTL_MPTE13_LOC <<2) <= Address
< 0x800C0000 + ((HW_DIGCTL_MPTE13_LOC + 2^SPAN)<<2)
0x800C0000 + (HW_DIGCTL_MPTE12_LOC <<2) <= Address
< 0x800C0000 + ((HW_DIGCTL_MPTE12_LOC + 2^SPAN)<<2)
0x800C0000 + (HW_DIGCTL_MPTE11_LOC <<2) <= Address
< 0x800C0000 + ((HW_DIGCTL_MPTE11_LOC + 2^SPAN)<<2)
0x800C0000 + (HW_DIGCTL_MPTE10_LOC <<2) <= Address
< 0x800C0000 + ((HW_DIGCTL_MPTE10_LOC + 2^SPAN)<<2)
0x800C0000 + (HW_DIGCTL_MPTE9_LOC <<2) <= Address
< 0x800C0000 + ((HW_DIGCTL_MPTE9_LOC + 2^SPAN)<<2)
0x800C0000 + (HW_DIGCTL_MPTE8_LOC <<2) <= Address<
0x800C0000 + (HW_DIGCTL_MPTE7_LOC <<2) <= Address
< 0x800C0000 + ((HW_DIGCTL_MPTE7_LOC + 2^SPAN)<<2)
0x800C0000 + (HW_DIGCTL_MPTE6_LOC <<2) <= Address
< 0x800C0000 + ((HW_DIGCTL_MPTE6_LOC + 2^SPAN)<<2)
0x800C0000 + (HW_DIGCTL_MPTE5_LOC <<2) <= Address
< 0x800C0000 + ((HW_DIGCTL_MPTE5_LOC + 2^SPAN)<<2)
0x800C0000 + (HW_DIGCTL_MPTE4_LOC <<2) <= Address
< 0x800C0000 + ((HW_DIGCTL_MPTE4_LOC + 2^SPAN)<<2)
0x800C0000 + (HW_DIGCTL_MPTE3_LOC <<2) <= Address
< 0x800C0000 + ((HW_DIGCTL_MPTE3_LOC + 2^SPAN)<<2)
0x800C0000 + (HW_DIGCTL_MPTE2_LOC <<2) <= Address
< 0x800C0000 + ((HW_DIGCTL_MPTE2_LOC + 2^SPAN)<<2)
0x800C0000 + (HW_DIGCTL_MPTE1_LOC <<2) <= Address
< 0x800C0000 + ((HW_DIGCTL_MPTE1_LOC + 2^SPAN)<<2)
0x800C0000 + (HW_DIGCTL_MPTE0_LOC <<2) <= Address
< 0x800C0000 + ((HW_DIGCTL_MPTE0_LOC + 2^SPAN)<<2)
0x800C0000 + ((HW_DIGCTL_MPTE8_LOC + 2^SPAN)<<2)
i.MX28 Applications Processor Reference Manual, Rev. 1, 2010
Table 3-1. Default First-Level Page Table
0x800C2000
ADDRESS
Default First-Level Page Table PIO Register Map
PTE 2048 is semi-programmable, as shown in
HW_DIGCTL_MPTE15_LOC) << 20)
HW_DIGCTL_MPTE14_LOC) << 20)
HW_DIGCTL_MPTE13_LOC) << 20)
HW_DIGCTL_MPTE12_LOC) << 20)
HW_DIGCTL_MPTE11_LOC) << 20)
HW_DIGCTL_MPTE10_LOC) << 20)
Moveable PTE15 + ((Address[13:2] -
Moveable PTE14 + ((Address[13:2] -
Moveable PTE13 + ((Address[13:2] -
Moveable PTE12 + ((Address[13:2] -
Moveable PTE11 + ((Address[13:2] -
Moveable PTE10 + ((Address[13:2] -
HW_DIGCTL_MPTE9_LOC) << 20)
HW_DIGCTL_MPTE8_LOC) << 20)
HW_DIGCTL_MPTE7_LOC) << 20)
HW_DIGCTL_MPTE6_LOC) << 20)
HW_DIGCTL_MPTE5_LOC) << 20)
HW_DIGCTL_MPTE4_LOC) << 20)
HW_DIGCTL_MPTE3_LOC) << 20)
HW_DIGCTL_MPTE2_LOC) << 20)
HW_DIGCTL_MPTE1_LOC) << 20)
HW_DIGCTL_MPTE0_LOC) << 20)
Moveable PTE9 + ((Address[13:2] -
Moveable PTE8 + ((Address[13:2] -
Moveable PTE7 + ((Address[13:2] -
Moveable PTE6 + ((Address[13:2] -
Moveable PTE5 + ((Address[13:2] -
Moveable PTE4 + ((Address[13:2] -
Moveable PTE3 + ((Address[13:2] -
Moveable PTE2 + ((Address[13:2] -
Moveable PTE1 + ((Address[13:2] -
Moveable PTE0 + ((Address[13:2] -
DESCRIPTION
Entry
Freescale Semiconductor, Inc.
2048.