MCIMX281AVM4B Freescale Semiconductor, MCIMX281AVM4B Datasheet - Page 1943
MCIMX281AVM4B
Manufacturer Part Number
MCIMX281AVM4B
Description
IC MPU I.MX28 1.2 289MAPBGA
Manufacturer
Freescale Semiconductor
Series
i.MX28r
Datasheets
1.MCIMX283DVM4B.pdf
(2327 pages)
2.MCIMX283DVM4B.pdf
(20 pages)
3.MCIMX281AVM4B.pdf
(72 pages)
Specifications of MCIMX281AVM4B
Core Processor
ARM9
Core Size
32-Bit
Speed
454MHz
Connectivity
CAN, EBI/EMI, Ethernet, I²C, MMC, SmartCard, SPI, SSI, UART/USART, USB OTG
Peripherals
DMA, I²S, LCD, POR, PWM, WDT
Program Memory Size
128KB (32K x 32)
Program Memory Type
Mask ROM
Ram Size
32K x 32
Voltage - Supply (vcc/vdd)
1.25 V ~ 5.25 V
Data Converters
A/D 17x12b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
289-LFBGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Number Of I /o
-
Eeprom Size
-
Lead Free Status / Rohs Status
Supplier Unconfirmed
- Current page: 1943 of 2327
- Download datasheet (17Mb)
30.4.1 UART Receive DMA Control Register (HW_UARTAPP_CTRL0)
The UART Receive DMA Control Register contains the dynamic information associated
with the receive command.
HW_UARTAPP_CTRL0: 0x000
HW_UARTAPP_CTRL0_SET: 0x004
HW_UARTAPP_CTRL0_CLR: 0x008
HW_UARTAPP_CTRL0_TOG: 0x00C
This register contains the main DMA controls for Receiving data.
Address:
Freescale Semiconductor, Inc.
Reset
8006_A0A0
8006_A000
8006_A010
8006_A020
8006_A030
8006_A040
8006_A050
8006_A060
8006_A070
8006_A080
8006_A090
Absolute
address
Bit
W
(hex)
R
31
1
HW_UARTAPP_CTRL0
UART Receive DMA Control Register
(HW_UARTAPP_CTRL0)
UART Transmit DMA Control Register
(HW_UARTAPP_CTRL1)
UART Control Register (HW_UARTAPP_CTRL2)
UART Line Control Register (HW_UARTAPP_LINECTRL)
UART Line Control 2 Register (HW_UARTAPP_LINECTRL2)
UART Interrupt Register (HW_UARTAPP_INTR)
UART Data Register (HW_UARTAPP_DATA)
UART Status Register (HW_UARTAPP_STAT)
UART Debug Register (HW_UARTAPP_DEBUG)
UART Version Register (HW_UARTAPP_VERSION)
UART AutoBaud Register (HW_UARTAPP_AUTOBAUD)
30
1
RUN
29
0
i.MX28 Applications Processor Reference Manual, Rev. 1, 2010
28
0
Register name
27
0
8006_A000h base + 0h offset = 8006_A000h
HW_UARTAPP memory map
26
0
25
0
24
0
23
0
22
0
(in bits)
RXTIMEOUT
Width
32
32
32
32
32
32
32
32
32
32
32
21
0
Chapter 30 Application UART (AUART)
Access
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R
R
20
0
C003_0000h
C9F0_0000h
Reset value
0000_0000h
0022_0300h
0000_0000h
0000_0000h
0000_0000h
0000_0000h
0000_0000h
0301_0000h
0000_0000h
19
0
18
0
30.4.10/1957
30.4.11/1957
30.4.1/1943
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30.4.3/1945
30.4.4/1948
30.4.5/1949
30.4.6/1950
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30.4.8/1954
30.4.9/1955
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page
1943
16
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