MCIMX281AVM4B Freescale Semiconductor, MCIMX281AVM4B Datasheet - Page 865
MCIMX281AVM4B
Manufacturer Part Number
MCIMX281AVM4B
Description
IC MPU I.MX28 1.2 289MAPBGA
Manufacturer
Freescale Semiconductor
Series
i.MX28r
Datasheets
1.MCIMX283DVM4B.pdf
(2327 pages)
2.MCIMX283DVM4B.pdf
(20 pages)
3.MCIMX281AVM4B.pdf
(72 pages)
Specifications of MCIMX281AVM4B
Core Processor
ARM9
Core Size
32-Bit
Speed
454MHz
Connectivity
CAN, EBI/EMI, Ethernet, I²C, MMC, SmartCard, SPI, SSI, UART/USART, USB OTG
Peripherals
DMA, I²S, LCD, POR, PWM, WDT
Program Memory Size
128KB (32K x 32)
Program Memory Type
Mask ROM
Ram Size
32K x 32
Voltage - Supply (vcc/vdd)
1.25 V ~ 5.25 V
Data Converters
A/D 17x12b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
289-LFBGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Number Of I /o
-
Eeprom Size
-
Lead Free Status / Rohs Status
Supplier Unconfirmed
- Current page: 865 of 2327
- Download datasheet (17Mb)
10.8.7 AHB, APBH Bus Clock Control Register (HW_CLKCTRL_HBUS)
HW_CLKCTRL_HBUS: 0x060
HW_CLKCTRL_HBUS_SET: 0x064
HW_CLKCTRL_HBUS_CLR: 0x068
HW_CLKCTRL_HBUS_TOG: 0x06c
This register controls the clock divider that generates the CLK_H, the clock used by the
AHB and APBH buses, when HW_CLKCTRL_EMI_SYNC_MODE_EN = 0. Note: Do
not write register space when busy bit(s) are high.
EXAMPLE
HW_CLKCTRL_HBUS_WR(BF_CLKCTRL_HBUS_DIV(2)); // set CLK_H to half the ARM clock (CLK_P) frequency
Address:
Freescale Semiconductor, Inc.
Reset
Reset
ASM_BUSY
Bit
Bit
W
W
R
R
Field
31
31
15
0
0
HW_CLKCTRL_HBUS
30
14
0
0
This read-only bit field returns a one when the clock divider is busy transfering a new divider value across
clock domains.
29
13
0
0
i.MX28 Applications Processor Reference Manual, Rev. 1, 2010
28
12
0
0
HW_CLKCTRL_HBUS field descriptions
27
11
8004_0000h base + 60h offset = 8004_0060h
RSRVD1
0
0
26
10
0
0
25
0
0
9
24
0
0
8
Description
Chapter 10 Clock Generation and Control (CLKCTRL)
23
0
0
7
22
0
0
6
21
0
5
0
20
0
4
0
19
0
0
3
DIV
18
0
0
2
SLOW_DIV
17
0
0
1
16
0
1
0
865
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