MCIMX281AVM4B Freescale Semiconductor, MCIMX281AVM4B Datasheet - Page 944

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MCIMX281AVM4B

Manufacturer Part Number
MCIMX281AVM4B
Description
IC MPU I.MX28 1.2 289MAPBGA
Manufacturer
Freescale Semiconductor
Series
i.MX28r
Datasheets

Specifications of MCIMX281AVM4B

Core Processor
ARM9
Core Size
32-Bit
Speed
454MHz
Connectivity
CAN, EBI/EMI, Ethernet, I²C, MMC, SmartCard, SPI, SSI, UART/USART, USB OTG
Peripherals
DMA, I²S, LCD, POR, PWM, WDT
Program Memory Size
128KB (32K x 32)
Program Memory Type
Mask ROM
Ram Size
32K x 32
Voltage - Supply (vcc/vdd)
1.25 V ~ 5.25 V
Data Converters
A/D 17x12b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
289-LFBGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Number Of I /o
-
Eeprom Size
-
Lead Free Status / Rohs Status
Supplier Unconfirmed
Programmable Registers
HW_POWER_ANACLKCTRL_CLR: 0x168
HW_POWER_ANACLKCTRL_TOG: 0x16C
This register provides analog clock control.
Address:
944
Reset
Reset
SLOW_DITHER
INVERT_INCLK
DITHER_OFF
CKGATE_O
CKGATE_I
Bit
Bit
W
W
INVERT_
OUTCLK
RSRVD4
R
R
OUTDIV
30 28
25 11
Field
31
27
26
10
9
8
31
15
1
0
HW_POWER_ANACLKCTRL
4160h
30
14
0
0
RSRVD4[15:11]
Analog Output Clock Gate, Reserved for Freescale Debugging Purposes Only
Analog Output Clock Divider, Reserved for Freescale Debugging Purposes Only
Analog Output Clock Invert, Reserved for Freescale Debugging Purposes Only
Analog Input Clock Gate, Reserved for Freescale Debugging Purposes Only
Reserved
Clock Dither Disable, Reserved for Freescale Debugging Purposes Only
Set 0x1 to make the configuration INDIV<1:0> and INCLK_SHIFT available, but there would be <= 0.67us
timing delay between HSADC start conversion and ‘start run’ command from software trigger or PWM trigger.
If this delay is not desired, it is recommended to set INDIV<1:0> to 0x2 and using PWM trigger for HSADC.
Analog Input Clock Invert, Reserved for Freescale Debugging Purposes Only
OUTDIV
29
13
0
0
i.MX28 Applications Processor Reference Manual, Rev. 1, 2010
HW_POWER_ANACLKCTRL field descriptions
28
12
0
0
27
11
0
0
8004_4000h base + 160h offset = 8004_
26
10
1
1
25
0
0
9
24
0
0
8
Description
23
RSRVD3
0
0
7
22
0
0
6
RSRVD4[25:16]
INCLK_SHIFT
21
0
5
0
20
0
4
0
Freescale Semiconductor, Inc.
19
0
0
3
18
0
0
2
INDIV
17
0
0
1
16
0
0
0

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