MCIMX281AVM4B Freescale Semiconductor, MCIMX281AVM4B Datasheet - Page 544
MCIMX281AVM4B
Manufacturer Part Number
MCIMX281AVM4B
Description
IC MPU I.MX28 1.2 289MAPBGA
Manufacturer
Freescale Semiconductor
Series
i.MX28r
Datasheets
1.MCIMX283DVM4B.pdf
(2327 pages)
2.MCIMX283DVM4B.pdf
(20 pages)
3.MCIMX281AVM4B.pdf
(72 pages)
Specifications of MCIMX281AVM4B
Core Processor
ARM9
Core Size
32-Bit
Speed
454MHz
Connectivity
CAN, EBI/EMI, Ethernet, I²C, MMC, SmartCard, SPI, SSI, UART/USART, USB OTG
Peripherals
DMA, I²S, LCD, POR, PWM, WDT
Program Memory Size
128KB (32K x 32)
Program Memory Type
Mask ROM
Ram Size
32K x 32
Voltage - Supply (vcc/vdd)
1.25 V ~ 5.25 V
Data Converters
A/D 17x12b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
289-LFBGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Number Of I /o
-
Eeprom Size
-
Lead Free Status / Rohs Status
Supplier Unconfirmed
- Current page: 544 of 2327
- Download datasheet (17Mb)
Programmable Registers
7.5.26 AHB to APBX DMA Channel 2 Debug Information
This register gives debug visibility for the APB and AHB byte counts for DMA Channel
2.
This register allows debug visibility of the APBX DMA Channel 2.
Address:
Re-
7.5.27 APBX DMA Channel 3 Current Command Address Register
The APBX DMA Channel 3 current command address register points to the multiword
command that is currently being executed. Commands are threaded on the command address.
Because channel 3 is not assigned to any peripheral, this register is of no practical usage
and just reserved for compatibility.
Address:
Re-
544
set
set
Bit
Bit
W
W
R
R
AHB_BYTES
APB_BYTES
CMD_ADDR
31
31
0
0
31 16
Field
15 0
Field
31 0
30
30
0
0
29
29
0
0
(HW_APBX_CH2_DEBUG2)
(HW_APBX_CH3_CURCMDAR)
HW_APBX_CH2_DEBUG2
HW_APBX_CH3_CURCMDAR
28
28
0
0
This value reflects the current number of APB bytes remaining to be transfered in the current transfer.
This value reflects the current number of AHB bytes remaining to be transfered in the current transfer.
Pointer to command structure currently being processed for channel 3.
27
27
0
0
26
26
0
0
i.MX28 Applications Processor Reference Manual, Rev. 1, 2010
25
25
APB_BYTES
0
0
HW_APBX_CH3_CURCMDAR field descriptions
24
24
HW_APBX_CH2_DEBUG2 field descriptions
0
0
23
23
0
0
22
22
0
0
21
21
0
0
8002_4000h base + 240h offset = 8002_4240h
20
20
0
0
8002_4000h base + 250h offset = 8002_4250h
19
19
0
0
18
18
0
0
17
17
0
CMD_ADDR
0
16
16
0
0
15
15
0
0
Description
Description
14
14
0
0
13
13
0
0
12
12
0
0
11
11
0
0
10
10
0
0
AHB_BYTES
0
0
9
9
0
0
8
8
Freescale Semiconductor, Inc.
0
0
7
7
0
0
6
6
0
0
5
5
0
0
4
4
3
0
3
0
0
0
2
2
0
0
1
1
0
0
0
0
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