MCIMX281AVM4B Freescale Semiconductor, MCIMX281AVM4B Datasheet - Page 481

• Manufacturer Part Number: MCIMX281AVM4B
• Description: IC MPU I.MX28 1.2 289MAPBGA
• Manufacturer: Freescale Semiconductor
• Series: i.MX28r

Specifications of MCIMX281AVM4B

• Core Processor: ARM9
• Core Size: 32-Bit
• Speed: 454MHz
• Connectivity: CAN, EBI/EMI, Ethernet, I²C, MMC, SmartCard, SPI, SSI, UART/USART, USB OTG
• Peripherals: DMA, I²S, LCD, POR, PWM, WDT
• Program Memory Size: 128KB (32K x 32)
• Program Memory Type: Mask ROM
• Ram Size: 32K x 32
• Voltage - Supply (vcc/vdd): 1.25 V ~ 5.25 V
• Data Converters: A/D 17x12b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 289-LFBGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Number Of I /o: -
• Eeprom Size: -
• Lead Free Status / Rohs Status: Supplier Unconfirmed

Address:
Re-
6.5.106 APBH DMA channel 14 Current Command Address Register
The APBH DMA channel 14 current command address register points to the multiword
command that is currently being executed. Commands are threaded on the command address.
Because channel 14 is not assigned to any peripheral, this register is of no practical usage
and just reserved for compatibility.
Address:
Re-
6.5.107 APBH DMA channel 14 Next Command Address Register
The APBH DMA channel 14 next command address register points to the next multiword
command to be executed. Commands are threaded on the command address. Set CHAIN
to one to process command lists.
Freescale Semiconductor, Inc.
set
set
Bit
Bit
W
W
R
R
AHB_BYTES
APB_BYTES
CMD_ADDR
31
31
0
0
31 16
Field
15 0
Field
31 0
30
30
0
0
29
29
0
0
HW_APBH_CH13_DEBUG2
HW_APBH_CH14_CURCMDAR 8000_4000h base + 720h offset = 8000_4720h
(HW_APBH_CH14_CURCMDAR)
(HW_APBH_CH14_NXTCMDAR)
28
28
0
0
This value reflects the current number of APB bytes remaining to be transfered in the current transfer.
This value reflects the current number of AHB bytes remaining to be transfered in the current transfer.
Pointer to command structure currently being processed for channel 14.
27
27
0
0
26
26
0
0
i.MX28 Applications Processor Reference Manual, Rev. 1, 2010
25
25
APB_BYTES
0
0
HW_APBH_CH14_CURCMDAR field descriptions
HW_APBH_CH13_DEBUG2 field descriptions
24
24
0
0
23
23
0
0
22
22
0
0
21
21
0
0
8000_4000h base + 710h offset = 8000_4710h
20
20
0
0
19
19
0
0
18
18
0
0
17
17
0
CMD_ADDR
0
Chapter 6 AHB-to-APBH Bridge with DMA (APBH-Bridge-DMA)
16
16
0
0
15
15
0
0
Description
Description
14
14
0
0
13
13
0
0
12
12
0
0
11
11
0
0
10
10
0
0
AHB_BYTES
0
0
9
9
0
0
8
8
0
0
7
7
0
0
6
6
0
0
5
5
0
0
4
4
3
0
3
0
0
0
2
2
0
0
1
1
481
0
0
0
0