MCIMX281AVM4B Freescale Semiconductor, MCIMX281AVM4B Datasheet - Page 907
MCIMX281AVM4B
Manufacturer Part Number
MCIMX281AVM4B
Description
IC MPU I.MX28 1.2 289MAPBGA
Manufacturer
Freescale Semiconductor
Series
i.MX28r
Datasheets
1.MCIMX283DVM4B.pdf
(2327 pages)
2.MCIMX283DVM4B.pdf
(20 pages)
3.MCIMX281AVM4B.pdf
(72 pages)
Specifications of MCIMX281AVM4B
Core Processor
ARM9
Core Size
32-Bit
Speed
454MHz
Connectivity
CAN, EBI/EMI, Ethernet, I²C, MMC, SmartCard, SPI, SSI, UART/USART, USB OTG
Peripherals
DMA, I²S, LCD, POR, PWM, WDT
Program Memory Size
128KB (32K x 32)
Program Memory Type
Mask ROM
Ram Size
32K x 32
Voltage - Supply (vcc/vdd)
1.25 V ~ 5.25 V
Data Converters
A/D 17x12b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
289-LFBGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Number Of I /o
-
Eeprom Size
-
Lead Free Status / Rohs Status
Supplier Unconfirmed
- Current page: 907 of 2327
- Download datasheet (17Mb)
11.5 Battery Monitor
The power control system includes a battery monitor. The battery monitor has two functions:
battery brownout detection and battery voltage feedback to the DC-DC converter.
If the battery voltage drops below the programmable brownout, then a fast interrupt (FIQ)
can be generated for the CPU. Software typically uses the LRADC to monitor the battery
voltage and shut down elegantly while there is a minimal operating margin. But, if an
unexpected event (such as a battery removal) occurs, then the system needs to be placed
immediately in the off state to ensure that it can restart properly. The brownout is controlled
in the HW_POWER_BATTMONITOR register. The IRQ must also be enabled in the
interrupt collector.
Freescale Semiconductor, Inc.
Figure 11-3. Power-Up, Power-Down, and Reset Flow Chart
i.MX28 Applications Processor Reference Manual, Rev. 1, 2010
HW_RTC_PERSISTENT0_AUTO_RESTART
Software-Controlled Resets Normal Power-Up Flow
Set HW_POWER_RESET_PWD
then HW_POWER_RESET_PWD
Set HW_CLKCTRL_RESET_CHIP
Set HW_CLKCTRL_RESET_DIG
To Reset Digital but not DCDC
To Reset DCDC and Digital:
To Power Down:
For Cold Reboot:
(warm boot):
(Non persistent and non-POWER
(Clock and Persistent Bits Reset)
(Persistent bits retain state, XTAL
frequency and gating, boot CPU )
(Digital clock domains at default
continues to operate even if the
asserted, Note that the DCDC
PIO registers are reset. Digital
(All non-persistent flop resets
Reset DCDC PIO Registers
and clock active if enabled)
flop resets asserted. Digital
Start 5V Linear Regs if 5V
Digital clocks all = 1 MHz)
Reset Non-DCDC Digital
Detect, else start DCDC
(Digital Reset Asserted.
(Start XTAL if it’s off ,
Start Digital Clocks
clocks all = 1 MHz)
clocks all = 1 MHz)
No Battery, no 5V.
Power-On Reset
Release Reset
State Zero
No Power
Power Up
converter)
Registers
Battery Insert or
AUTO_RESTART=1 or
Wait 16 cycles for all
resets to propogate
Power is Stable
5V_Detect=1
PSWITCH=1 or
5V_DETECT=1
RTC Alarm or
Chapter 11 Power Supply
907
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