MCIMX281AVM4B Freescale Semiconductor, MCIMX281AVM4B Datasheet - Page 1867

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MCIMX281AVM4B

Manufacturer Part Number
MCIMX281AVM4B
Description
IC MPU I.MX28 1.2 289MAPBGA
Manufacturer
Freescale Semiconductor
Series
i.MX28r
Datasheets

Specifications of MCIMX281AVM4B

Core Processor
ARM9
Core Size
32-Bit
Speed
454MHz
Connectivity
CAN, EBI/EMI, Ethernet, I²C, MMC, SmartCard, SPI, SSI, UART/USART, USB OTG
Peripherals
DMA, I²S, LCD, POR, PWM, WDT
Program Memory Size
128KB (32K x 32)
Program Memory Type
Mask ROM
Ram Size
32K x 32
Voltage - Supply (vcc/vdd)
1.25 V ~ 5.25 V
Data Converters
A/D 17x12b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
289-LFBGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Number Of I /o
-
Eeprom Size
-
Lead Free Status / Rohs Status
Supplier Unconfirmed
29.9.27 ENET SWI Low Memory threshold.
If less than the programmed number of cells is available in the memory, the switch will
discard frames. The value should be chosen to give enough margin of at least 2 full sized
frames. A memory overflow due to a too low threshold is a fatal error and may require a
device reset.
Address:
Re-
29.9.28 ENET SWI Statistic providing the lowest number of free cells
Statistic providing the lowest number of free cells reached in memory during operation
since this statistics was last cleared. The value is reset to the maximum when a write to the
register with any value is performed.
Address:
Re-
Freescale Semiconductor, Inc.
set
set
Bit
Bit
W
W
R
R
MINCELLS
31
31
RSRVD0
0
0
QMGR_
Field
31 8
7 0
30
30
0
0
29
29
0
0
HW_ENET_SWI_QMGR_MINCELLS
8084h
HW_ENET_SWI_QMGR_ST_MINCELLS
800F_8088h
(HW_ENET_SWI_QMGR_MINCELLS)
reached in memory (HW_ENET_SWI_QMGR_ST_MINCELLS)
28
28
0
0
Reserved bits. Write as 0.
Default: 9 = (2,3Kbyte).
27
27
0
0
26
26
0
0
HW_ENET_SWI_QMGR_MINCELLS field descriptions
i.MX28 Applications Processor Reference Manual, Rev. 1, 2010
25
25
0
0
24
24
0
0
23
23
0
0
22
22
0
0
21
21
0
0
RSRVD0
20
20
0
0
19
19
0
0
Chapter 29 Programmable 3-Port Ethernet Switch with QOS (SWITCH)
QMGR_ST_MINCELLS
18
18
0
0
800F_8000h base + 84h offset = 800F_
17
17
0
0
800F_8000h base + 88h offset =
16
16
0
0
15
15
0
0
Description
14
14
0
0
13
13
0
0
12
12
0
0
11
11
0
0
10
10
0
0
0
0
9
9
0
0
8
8
0
0
7
7
0
0
6
6
QMGR_MINCELLS
0
0
5
5
0
0
4
4
3
1
3
0
0
0
2
2
0
0
1
1
1867
1
0
0
0

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