ATMEGA128RFA1-ZU Atmel, ATMEGA128RFA1-ZU Datasheet - Page 101

• Manufacturer Part Number: ATMEGA128RFA1-ZU
• Description: IC AVR MCU 2.4GHZ XCEIVER 64QFN
• Manufacturer: Atmel
• Series: ATMEGAr

Specifications of ATMEGA128RFA1-ZU

• Frequency: 2.4GHz
• Data Rate - Maximum: 2Mbps
• Modulation Or Protocol: 802.15.4 Zigbee
• Applications: General Purpose
• Power - Output: 3.5dBm
• Sensitivity: -100dBm
• Voltage - Supply: 1.8 V ~ 3.6 V
• Current - Receiving: 12.5mA
• Current - Transmitting: 14.5mA
• Data Interface: PCB, Surface Mount
• Memory Size: 128kB Flash, 4kB EEPROM, 16kB RAM
• Antenna Connector: PCB, Surface Mount
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 64-VFQFN, Exposed Pad
• Rf Ic Case Style: QFN
• No. Of Pins: 64
• Supply Voltage Range: 1.8V To 3.6V
• Operating Temperature Range: -40°C To +85°C
• Svhc: No SVHC (15-Dec-2010)
• Rohs Compliant: Yes
• Processor Series: ATMEGA128x
• Core: AVR8
• Data Bus Width: 8 bit
• Program Memory Type: Flash
• Program Memory Size: 128 KB
• Data Ram Size: 16 KB
• Interface Type: JTAG
• Maximum Clock Frequency: 16 MHz
• Number Of Programmable I/os: 38
• Number Of Timers: 6
• Operating Supply Voltage: 1.8 V to 3.6 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: EWAVR, EWAVR-BL
• Development Tools By Supplier: ATAVR128RFA1-EK1
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

9.12.2 AES_STATUS – AES Status Register
8266A-MCU Wireless-12/09
Table 9-28 AES_MODE Register Bits
• Bit 4 – Res - Reserved Bit
This bit is reserved for future use. The result of a read access is undefined. The register
bit must always be written with the reset value.
• Bit 3 – AES_DIR - Set AES Operation Direction
This register bit sets the AES operation direction to either encryption or decryption.
Table 9-29 AES_DIR Register Bits
• Bit 2 – AES_IM - AES Interrupt Enable
This register bit is used to enable the AES interrupt.
• Bit 1:0 – Res1:0 - Reserved Bit
These bits are reserved for future use. The result of a read access is undefined. The
register bits must always be written with the reset value.
This read-only register signals the status of the security module and operation. Note
that the AES_STATUS register is cleared when entering the radio transceiver SLEEP
state.
• Bit 7 – AES_ER - AES Operation Finished with Error
This register bit indicates an error during AES module run. An error occurs if accessing
AES_CTRL while an AES operation is running or if AES_KEY or AES_STATE Memory
is not loaded completely or less than 16 Byte read from AES_STATE.
• Bit 6:1 – Res5:0 - Reserved
These bits are reserved for future use.
• Bit 0 – AES_DONE - AES Operation Finished with Success
This register bit indicates a successfully finished operation of the AES module.
Bit
NA ($13D)
Read/Write
Initial Value
Register Bits
AES_MODE
Register Bits
AES_DIR
AES_ER
R
7
0
Res5
R
6
0
Res4
R
5
0
Value
Value
Res3
0
1
0
1
R
4
0
Res2
R
3
0
Description
AES Mode is ECB (Electronic Code Book).
AES Mode is CBC (Cipher Block Chaining).
Description
AES operation is encryption.
AES operation is decryption.
Res1
R
2
0
ATmega128RFA1
Res0
R
1
0
AES_DONE AES_STATUS
R
0
0
101